Ternary Content-Addressable Memory Compression and Hashing

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Solution Overview

Problem

Ternary content-addressable memory (TCAM) systems face challenges with excessive resource usage and heat generation due to suboptimal processing of records, leading to limited compactness and speed in applications like network routing and database searches.

Innovation Solution

The method involves removing 'X' bits from entries, compressing and hashing data, and using bin-packing algorithms to optimize storage and processing, thereby reducing the number of entries that need to be checked and minimizing heat generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all TCAM entries are searched including X bits, then search completeness is maintained, but resource usage and heat generation increase excessively

Engineering Contradiction:
Improvesearch completenessVSAvoidresource usage and heat generation
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts and removes X bits from TCAM entries before storage and search operations. By eliminating these irrelevant bits, the system maintains search completeness for meaningful data while significantly reducing the number of bits processed, thereby lowering resource consumption and heat generation during search operations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the parameter of bit relevance by transforming TCAM entries to exclude X bits. This parameter change allows the system to focus computational resources only on meaningful bits, improving energy efficiency while preserving search accuracy for the relevant data portions.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If X bits are removed from entries, then resource usage and heat generation are reduced, but search accuracy may be compromised

Engineering Contradiction:
Improveresource usageVSAvoidsearch accuracy
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system extracts only the X bits that are explicitly marked as irrelevant or don't-care bits. By removing only these specific bits rather than random bits, the patent preserves all meaningful information needed for accurate search while reducing the data volume for processing.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies local quality by differentiating between meaningful bits and irrelevant X bits. The system treats these bit types differently - retaining and processing meaningful bits while removing X bits. This localized differentiation maintains search accuracy for critical data while optimizing resource usage.

Inventive Principle:
Principle #3Local quality

3Productivity

If TCAM entries are compressed and hashed, then compactness and processing speed increase, but system complexity increases

Engineering Contradiction:
Improveprocessing speed and compactnessVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing compression and hashing of TCAM entries before they are stored in the memory array. This pre-processing step organizes and condenses the data structure, enabling faster search operations and improved compactness while managing the added complexity through systematic data preparation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the TCAM entry processing into distinct stages: compression, hashing, and storage. This segmentation allows each operation to be optimized independently and simplifies the overall system architecture by breaking down the complex data handling process into manageable, sequential steps.

Inventive Principle:
Principle #1Segmentation

4Reliability

If all TCAM entries are processed, then search thoroughness is maintained, but computational time and heat generation increase

Engineering Contradiction:
Improvesearch thoroughnessVSAvoidcomputational time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

By extracting and removing X bits from all TCAM entries beforehand, the system reduces the effective search space. This allows thorough search of meaningful entries while minimizing the computational time required, as the search algorithm only needs to process the reduced set of meaningful bits rather than all original bits.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the data representation parameter by removing X bits, transforming the search problem from processing full-length entries to processing shortened entries. This parameter change maintains search thoroughness for meaningful data while significantly reducing the computational time and energy required for each comparison operation.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8195873B2Ternary content-addressable memory
Publication Date: 2012.06.05 CORIGINE ELECTRONICS TECH CO LTD
  • US8195873B2 patent drawing
  • US8195873B2 patent drawing
  • US8195873B2 patent drawing

AI summary

A low-heat, large-scale ternary content-addressable memory (TCAM) efficiently compares one or more input records with a set of entries. Compression may also be used. X bits are eliminated from entries and in some embodiments, a subset of non-X bits are also eliminated, minimizing entries that must be searched. Entry bit sets can be converted into sets of fields. A useful set of fields is a triplet comprising a start field, a length field, and a data field. Hashing determines the RAM line of the TCAM in which entries are stored and which RAM line is to be compared with a given input. Searches are only needed on entries in RAM lines corresponding to inputs of interest. Priority values decide the winner if more than one TCAM entry in the appropriate RAM line matches the input. Bin packing can be used to optimally allocate TCAM entries across different possible RAM lines.