TCAM Power Reduction via Hash RAM Preprocessing
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Solution Overview
Problem
Ternary Content Addressable Memory (TCAM) systems face high power consumption due to frequent searches in data RAMs, especially at higher clock speeds, and existing solutions do not efficiently manage 'don't care' bits, leading to unnecessary searches and power wastage.
Innovation Solution
The implementation of a device with TCAM blocks, hash RAM, and processor electronics that preprocess control records to identify subsets of bits with no 'X' value, use a bloom filter to exclude unnecessary TCAM checks, and employ a programmable bit selector to map bits to hash RAM, reducing dynamic power consumption by selectively activating TCAM arrays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If TCAM performs frequent searches in data RAMs to handle network packets, then search capability and matching accuracy are improved, but power consumption increases significantly
Solution Approach 1:
The patent applies preliminary action by pre-computing hash values of control records and storing them in hash RAM before search operations. This allows the system to quickly determine which TCAM blocks need to be searched, avoiding unnecessary searches and reducing power consumption while maintaining search capability.
Solution Approach 2:
The patent segments the TCAM into multiple blocks and uses hash-based addressing to selectively activate only the relevant blocks for each search operation. This segmentation allows the system to perform searches in a distributed manner, reducing the power consumption of any single block while maintaining overall search capability.
2Reliability
If TCAM searches all blocks for every packet to ensure no matches are missed, then search completeness is improved, but search time and power consumption increase
Solution Approach 1:
The patent pre-computes and stores hash values of control records in hash RAM before search operations. During search, the hash value of the incoming packet is computed and used to directly identify which TCAM blocks contain matching records, eliminating the need to search all blocks and significantly reducing search time while maintaining completeness.
Solution Approach 2:
The patent introduces hash RAM as an intermediary between the packet input and TCAM blocks. The hash RAM stores pre-computed hash values and serves as a mediator that quickly identifies which TCAM blocks need to be searched, reducing the time and power required for complete searches.
3Productivity
If TCAM operates at higher clock speeds to increase processing throughput, then productivity is improved, but dynamic power consumption increases
Solution Approach 1:
The patent implements periodic action by selectively activating only the TCAM blocks that are relevant to the current search operation, as identified by the hash RAM. This allows the system to operate at higher clock speeds for active blocks while keeping inactive blocks in a low-power state, thereby increasing throughput without proportionally increasing overall power consumption.
Solution Approach 2:
The patent applies dynamics by making the activation state of TCAM blocks dynamic rather than static. Blocks are activated only when needed, as determined by the hash-based addressing mechanism, allowing the system to adapt its power consumption to the actual workload and maintain high throughput efficiency.
4Adaptability or versatility
If TCAM includes don't care bits to increase matching flexibility, then adaptability is improved, but the number of unnecessary searches increases leading to higher power consumption
Solution Approach 1:
The patent pre-computes hash values for control records containing don't care bits and stores them in hash RAM. During search, the hash-based addressing mechanism quickly identifies which TCAM blocks may contain matches, even when don't care bits are present. This reduces the number of unnecessary searches triggered by flexible matching, thereby reducing power consumption while maintaining adaptability.
Data Source
AI summary
The present disclosure describes systems and techniques relating to accessing data stored in Ternary Content Addressable Memory (TCAM). According to an aspect of the described systems and techniques, a device includes: several blocks of TCAM (Ternary Content Addressable Memory); a hash RAM (Random Access Memory); and processor electronics configured to pre-process control records to (i) identify a subset of bits of the control records, giving priority to bits with no X value, (ii) load the hash RAM based on the identified subset of the bits to be used for hashing of search records to find locations in the several blocks of TCAM, and (iii) order the control records in the several blocks of TCAM in accordance with the identified subset of the bits.


