TCAM LPM Compression Using Hash-Based Parallel Prefix Matching

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Solution Overview

Problem

Trie search techniques used in ternary content addressable memory (TCAM) for determining longest prefix matches in IP addresses are inefficient, leading to long and non-deterministic delay times, and occupy memory resources that cannot be used for alternative purposes.

Innovation Solution

A modulo math-based hash function is used to determine memory addresses for IP address keys, allowing simultaneous parallel comparison of non-X values to find the longest prefix match, eliminating the need for trie tree traversal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If trie search technique is used for LPM algorithm, then IP prefix matching can be performed, but delay time increases and becomes non-deterministic

Engineering Contradiction:
ImproveIP prefix matching accuracyVSAvoidsearch delay time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the IP address key into multiple fields (e.g., first field, second field, third field) and stores them in separate memory locations. This segmentation allows parallel access to different parts of the IP address, enabling simultaneous comparison operations that reduce search delay while maintaining deterministic timing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a sequential tree-based search approach to a parallel memory-based search approach. By organizing IP prefix data in a multi-dimensional memory structure with separate fields and locations, the system enables parallel comparison operations instead of sequential traversal, significantly reducing delay time while maintaining matching accuracy.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If trie search technique is used for LPM algorithm, then IP prefix matching can be performed, but device complexity increases

Engineering Contradiction:
ImproveIP prefix matching accuracyVSAvoidmemory structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the IP address into multiple segmentable fields (first field, second field, third field, etc.) that can be stored and processed independently in memory. This segmentation simplifies the memory structure by allowing straightforward field-based organization rather than complex tree structures, reducing device complexity while maintaining matching precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent reorganizes data storage from a hierarchical tree structure to a flat, field-based memory structure. By using separate memory locations for different IP address fields and enabling parallel access, the system reduces structural complexity while achieving the same LPM functionality through dimensional reorganization of data storage.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Measurement precision

If trie search technique is used for LPM algorithm, then IP prefix matching can be performed, but memory resources cannot be used for alternative purposes

Engineering Contradiction:
ImproveIP prefix matching accuracyVSAvoidmemory resource flexibility
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent segments IP address data into discrete, field-based units that can be independently stored and managed in memory. This segmentation allows the memory structure to be more flexible and adaptable, as each field can be independently accessed, modified, or repurposed for alternative uses while maintaining the core LPM functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transforms the memory organization from a rigid, dedicated tree structure to a flexible, field-based structure that supports parallel access and alternative uses. By organizing data in separable fields with independent memory locations, the system enables memory resources to be used for multiple purposes while maintaining IP prefix matching accuracy.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12184544B1Data compression for LPM in TCAM
Publication Date: 2024.12.31 DREAMBIG SEMICON INC
  • US12184544B1 patent drawing
  • US12184544B1 patent drawing
  • US12184544B1 patent drawing

AI summary

a content addressable memory circuit is provided that includes a memory array that includes multiple memory devices that include memory locations that share a memory address and are coupled for simultaneous access. Hash logic is operative to use modulo math to determine a memory address based upon non-X values within an IP address key. Memory controller logic is operative to cause a memory device in the memory array to store the received IP address key in a memory location at the determined memory address, in a format that includes a field-size value indicative of a number of non-X values within a received IP address key and that includes non-X values within the received IP address key.