TCP/IP Packet Offload Circuitry for Low-Power Fast Processing

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Solution Overview

Problem

Conventional packet processing in TCP/IP networks is computation-intensive, leading to significant processing overhead and power consumption.

Innovation Solution

Implementing hardware acceleration circuitry to perform TCP/IP packet processing directly without memory access, including checksum calculation, IP fragmentation, and TCP segmentation offload, while filtering redundant acknowledgments and prioritizing certain packets.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If TCP/IP packet processing is performed by CPU and system software, then processing can be completed with flexible control, but processing overhead and power consumption increase significantly

Engineering Contradiction:

Improveprocessing flexibilityVSAvoidpower consumption

Core Design Contradiction:

Ease of operationVSUse of energy by moving object

Solution Approach 1:

The patent segments packet processing into two paths: TCP/IP packets are handled by dedicated hardware acceleration circuitry, while non-TCP/IP packets are processed by the CPU. This segmentation allows energy-intensive operations to be offloaded from the CPU to specialized hardware, reducing overall power consumption while maintaining processing flexibility for different packet types.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a packet type determination mechanism as an intermediary that routes packets to appropriate processing paths. This mediator identifies TCP/IP packets and directs them to hardware acceleration circuitry, enabling the system to achieve low power consumption for common packet types while preserving CPU control flexibility for other cases.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If TCP/IP packet processing is performed by CPU through memory access, then comprehensive processing can be achieved, but processing time increases due to memory access overhead

Engineering Contradiction:

Improveprocessing capabilityVSAvoidprocessing time

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent segments processing based on packet type, directing TCP/IP packets to hardware acceleration circuitry that performs checksum calculation, IP fragmentation, and TCP segmentation offload without memory access. This segmentation eliminates memory access overhead for common packet types while preserving comprehensive processing capability through the alternative CPU path for non-TCP/IP packets.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent replaces the mechanical memory access process with direct hardware processing for TCP/IP packets. The hardware acceleration circuitry performs all necessary processing operations without requiring memory reads or writes, substituting the slow memory access mechanism with faster direct hardware computation.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Ease of operation

If all packets are processed through the same CPU path, then uniform processing can be applied, but productivity decreases due to computation-intensive operations

Engineering Contradiction:

Improveprocessing uniformityVSAvoidpacket processing throughput

Core Design Contradiction:

Ease of operationVSProductivity

Solution Approach 1:

The patent segments the processing path based on packet type identification. TCP/IP packets are routed to hardware acceleration circuitry for high-speed processing, while non-TCP/IP packets continue through the CPU path. This segmentation increases overall productivity by accelerating the majority of traffic while maintaining uniform processing quality through consistent handling standards.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent changes the processing parameter from unified CPU-based software processing to differentiated processing based on packet type. By identifying TCP/IP protocol characteristics and routing them to hardware acceleration, the system transforms the processing mode from homogeneous to heterogeneous, achieving higher throughput while maintaining processing uniformity through protocol-aware optimization.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20250379927A1Method and device for speeding up packet processing

Publication Date: 2025.12.11 MEDIATEK INC

AI summary

A method for speeding up packet processing is provided. The method includes: receiving, by a hardware acceleration circuitry of a computing device, a packet from an application layer. The method includes determining, by the hardware acceleration circuitry, whether the packet is a transmission control protocol/Internet protocol (TCP/IP) packet. The method includes performing, by the hardware acceleration circuitry, related processing on the TCP/IP packet to obtain a processed TCP/IP packet after the related processing in response to determining that the packet is the TCP/IP packet. The method includes transmitting, by the hardware acceleration circuitry, the processed TCP/IP packet to a lower layer.