Top Drain LDMOS Trench Source Interconnect

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Solution Overview

Problem

Conventional semiconductor power devices face challenges in reducing source inductance, leading to increased cell pitch and higher costs due to the need for bond-wires and large sinker regions, which also affect electrical performance.

Innovation Solution

A top-drain lateral diffusion MOS (TD-LDMOS) device with a trench source-body interconnect extending from the top surface through the body region down to the bottom source electrode, filled with SEG P++ or SEG P++ SiGe material, and surrounded by P++ liner implant regions, reduces cell pitch and source inductance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If deep sinker regions are used to connect top source to substrate, then source inductance is reduced, but cell pitch increases and manufacturing cost increases

Engineering Contradiction:

Improvesource inductanceVSAvoidcell pitch

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent inverts the conventional bottom-source configuration to a top-drain configuration. The source is positioned at the top surface while the drain is at the bottom, eliminating the need for deep P+ sinker regions that extend from top to bottom. This inversion allows direct top surface contact for the source, reducing cell pitch while maintaining low source inductance.

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The patent transitions from vertical current flow (bottom-source) to lateral current flow (top-drain). By changing the current path from vertical through the substrate to lateral across the epitaxial layer, the design eliminates the depth dimension requirement for sinker regions, reducing cell pitch in the planar dimension.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If bond-wires are used for source connection, then electrical connection is achieved, but source inductance increases

Engineering Contradiction:

Improvesource connectionVSAvoidsource inductance

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent extracts and eliminates the bond-wire from the source connection path by providing direct top surface contact for the source. The source region is formed at the top surface and can be directly contacted by metal, removing the intermediate bond-wire element that contributes to source inductance.

Inventive Principle:

Principle #2Taking out (Extraction)

3Reliability

If larger sinker regions are used, then source inductance is reduced, but manufacturing cost increases

Engineering Contradiction:

Improvesource inductanceVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

By inverting the device structure to top-drain configuration, the patent eliminates the need for large, deep sinker regions entirely. The source contact is made directly at the top surface, requiring minimal lateral diffusion and reducing both the area and complexity of the manufacturing process.

Inventive Principle:

Principle #13The other way round (Inversion)

4Device complexity

If vertical current flow is used, then device structure is conventional, but cell pitch increases

Engineering Contradiction:

Improvedevice structureVSAvoidcell pitch

Core Design Contradiction:

Device complexityVSArea of stationary object

Solution Approach 1:

The patent inverts the conventional vertical current flow arrangement by making the source the top contact and drain the bottom contact. This structural inversion enables lateral current flow that reduces the required cell pitch while maintaining a relatively simple device structure.

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The patent changes the current flow from vertical (through substrate depth) to lateral (across epitaxial layer). This dimensional change allows more compact cell layouts by utilizing the lateral dimension for current path rather than requiring vertical penetration through the substrate.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The TD-LDMOS device achieves reduced source inductance, lower manufacturing costs, and improved electrical performance by eliminating the need for deep sinker regions and bond-wires, enabling high efficiency and high-frequency applications.

Implementation Method 1

filled with SEG P++ or SEG P++ SiGe material

Methodology Applied

Scientific EffectSelective Epitaxial Growth: Epitaxy

Implementation Method 2

surrounded by P++ liner implant regions

Methodology Applied

Scientific EffectIon Implantation: Ion Implantation

Data Source

PatentUS10008598B2Top drain LDMOS

Publication Date: 2018.06.26 ALPHA & OMEGA SEMICONDUCTOR INC

AI summary

In an embodiment, this invention discloses a top-drain lateral diffusion metal oxide field effect semiconductor (TD-LDMOS) device supported on a semiconductor substrate. The TD-LDMOS includes a source electrode disposed on a bottom surface of the semiconductor substrate. The TD-LDMOS further includes a source region and a drain region disposed on two opposite sides of a planar gate disposed on a top surface of the semiconductor substrate wherein the source region is encompassed in a body region constituting a drift region as a lateral current channel between the source region and drain region under the planar gate. The TD-LDMOS further includes at least a trench filled with a conductive material and extending vertically from the body region near the top surface downwardly to electrically contact the source electrode disposed on the bottom surface of the semiconductor substrate.