Shared TDDB Control Circuit for Semiconductor Integrated Circuits

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Solution Overview

Problem

Conventional semiconductor integrated circuits require individual TDDB control circuits in each cell to prevent time-dependent dielectric breakdown (TDDB) deterioration, leading to increased chip area and inefficiency.

Innovation Solution

A semiconductor integrated circuit design that includes a TDDB control circuit with specific transistor configurations and output terminals, allowing sharing of the TDDB control function across multiple cells, thereby reducing the need for individual TDDB control circuits in each cell and controlling chip area expansion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If individual TDDB control circuits are provided in each cell, then TDDB deterioration is prevented, but chip area increases

Engineering Contradiction:
ImproveTDDB preventionVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges multiple TDDB control circuits into a single shared control circuit that can serve multiple cells. The control circuit includes a control signal generation unit that generates control signals and distributes them to multiple decoupling capacitance circuits, eliminating the need for separate control circuits in each cell while maintaining TDDB prevention functionality across all cells.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The control circuit is designed with multi-functionality to serve multiple cells simultaneously. The control signal generation unit can generate and distribute control signals to multiple decoupling capacitance circuits, allowing a single control circuit to perform the TDDB prevention function for numerous cells rather than requiring dedicated control circuits for each individual cell.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If individual TDDB control circuits are provided in each cell, then TDDB deterioration is prevented, but device complexity increases

Engineering Contradiction:
ImproveTDDB preventionVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple control functions into a single integrated control circuit. The control signal generation unit consolidates the control logic that would otherwise be distributed across multiple separate control circuits, reducing overall device complexity while maintaining comprehensive TDDB prevention coverage across all cells.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The control circuit is designed as a universal multi-functional unit that can control multiple decoupling capacitance circuits simultaneously. This multi-functionality reduces device complexity by replacing numerous simple control circuits with one sophisticated control unit that performs all necessary control functions.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7923755B2Semiconductor integrated circuit and method of designing semiconductor integrated circuit
Publication Date: 2011.04.12 SOCIONEXT INC
  • US7923755B2 patent drawing
  • US7923755B2 patent drawing
  • US7923755B2 patent drawing

AI summary

In the present invention, a decoupling capacitance circuit, a first output terminal and a second output terminal are provided. The decoupling capacitance circuit comprises a TDDB control circuit consisting of a first Tr and a second Tr, and a third Tr. Conductivity types of the first and second Trs are different from each other. A source of the first Tr is connected to a first power supply wiring, and a drain of the first Tr is connected to a gate of the second Tr. A source of the second Tr is connected to a second power supply wiring, and a drain of the second Tr is connected to a gate of the first Tr. The third and first Trs have the same conductivity type. A source and a drain of the third Tr are connected to the first power supply wiring, and a gate of the third Tr is connected to the drain of the second Tr. The first output terminal is connected to the drain of the first Tr, and the second output terminal is connected to the drain of the second Tr.