Time-to-Digital Converter with CDS for Low In-Band Phase Noise
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Digital phase-locked loops (DPLLs) face challenges due to in-band phase noise contributed by time-to-digital converters (TDCs), particularly from thermal, 1/f, and supply noise.
Innovation Solution
A high-performance TDC is developed using ratiometric scaling and correlated double sampling (CDS) techniques, which involves an input time sampling circuit and a fractional reference time sampling circuit to reduce noise and improve spectral purity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional TDC is used in DPLL, then phase detection function is achieved, but in-band phase noise increases
Solution Approach 1:
The patent extracts and removes noise components from the TDC output by implementing a noise cancellation mechanism that separates the desired phase detection signal from unwanted thermal, 1/f, and supply noise, thereby eliminating the harmful noise contribution while preserving the measurement function
Solution Approach 2:
The patent implements a feedback-based noise cancellation approach where the TDC noise is characterized and fed back into the system to actively cancel out the in-band phase noise, continuously adjusting to maintain low noise performance while preserving phase detection accuracy
2Object-generated harmful factors
If noise reduction techniques are applied in TDC, then spectral purity improves, but device complexity increases
Solution Approach 1:
The patent merges the noise cancellation functionality with the existing TDC structure by integrating the noise compensation mechanism into the same circuit blocks, sharing common components such as capacitors and switches between the coarse and fine TDC paths, thereby reducing overall complexity while achieving high spectral purity
Solution Approach 2:
The patent implements multi-functional circuit elements that serve both phase detection and noise cancellation purposes simultaneously, such as using the same capacitor arrays for both time measurement and noise filtering, eliminating the need for separate dedicated noise reduction circuits
Data Source
AI summary
The disclosed high-performance time-to-digital converter (TDC) incorporates ratiometric signal quantization with correlated double sampling (CDS). The TDC includes an input voltage circuit that outputs an input voltage signal and a fractional reference voltage circuit that outputs a fractional reference voltage signal. The TDC also includes a quantizer circuit that provides a differential output of the input voltage signal and the fractional reference voltage signal as a digital time value. Various other methods, systems, and computer-readable media are also disclosed.