Time-to-Digital Converter Jitter Detection for Accurate Phase Measurement

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Solution Overview

Problem

Time-to-digital converters (TDCs) face challenges in accurately measuring phase differences between periodic clock signals with jitter, as jitter introduces noise that affects the precision of phase difference calculations.

Innovation Solution

A TDC architecture that detects jitter in clock signals by examining sequences of counts for both periodic signals, using separate accumulators for positive and negative time differences when jitter is present, and aggregating them into a single accumulator when jitter is not present, to generate phase differences that disregard noise-induced errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a TDC measures phase differences using conventional methods, then the measurement process is simple, but measurement precision deteriorates due to jitter-induced noise

Engineering Contradiction:
Improvephase difference measurement accuracyVSAvoidTDC architecture complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the accumulation process into separate accumulators for positive and negative time differences. When jitter is detected, the system uses distinct accumulation paths (first accumulator for positive differences, second accumulator for negative differences) rather than a single accumulator, thereby reducing noise interference and improving measurement precision while maintaining manageable system complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically changes the accumulation parameter based on jitter detection. When jitter is present, the system switches to separate accumulator modes with different accumulation strategies; when jitter is absent, it uses conventional single-accumulator mode. This parameter adaptation allows the system to optimize measurement accuracy under varying signal conditions without requiring completely different architectures

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If separate accumulators are used for positive and negative time differences, then measurement accuracy improves in jittered signals, but device complexity increases

Engineering Contradiction:
Improvephase difference accuracy with jitterVSAvoidaccumulator structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements a dynamic accumulator structure that adapts its configuration based on jitter detection. The system includes control logic that monitors signal characteristics and automatically switches between single-accumulator and dual-accumulator modes. This dynamic adaptation allows the system to achieve high measurement accuracy when needed while maintaining simplicity during normal operation, effectively balancing precision requirements against device complexity

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent extracts the jitter-affected portions of the signal processing into separate accumulation paths. By isolating positive and negative time differences into distinct accumulators only when jitter is detected, the system removes the harmful noise components from the measurement process while keeping the overall architecture flexible and not permanently complex

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If jitter detection and separate accumulation are implemented, then reliability of phase measurement improves, but ease of operation deteriorates

Engineering Contradiction:
Improvephase difference measurement reliabilityVSAvoidTDC operation simplicity
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent implements a self-service mechanism where the TDC system automatically detects jitter conditions and adjusts its accumulation strategy without external intervention. The control logic monitors the input signals, identifies jitter presence through statistical analysis of time differences, and autonomously switches between accumulation modes. This self-managing approach maintains measurement reliability while preserving ease of operation, as users need not manually configure or monitor the complex accumulation processes

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11736110B2Time-to-digital converter (TDC) to operate with input clock signals with jitter
Publication Date: 2023.08.22 NINGBO AURA SEMICON CO LTD
  • US11736110B2 patent drawing
  • US11736110B2 patent drawing
  • US11736110B2 patent drawing

AI summary

A time-to-digital converter (TDC) provided according to an aspect of the present disclosure identifies existence of jitter in either one of two periodic signals received as inputs. In an embodiment, jitter is detected by examining a first sequence of counts and a second sequence of counts respectively for a first periodic signal and a second periodic signal received as input signals, with the first sequence of counts representing respective time instances on a time scale at which a first sequence of edges with a first direction of the first periodic signal occur, and the second sequence of counts representing respective time instances on the time scale at which a second sequence of edges with the first direction of the second periodic signal occur.