Resistor-Capacitor MAC Circuit Using TDC for Neural Network Throughput
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Solution Overview
Problem
Current multiplier-accumulator (MAC) circuits in computing devices are inefficient in performing vector matrix multiplication operations, particularly in neural networks, due to limitations in data transmission rate and power consumption, and require separate memory and arithmetic units, which restrict their performance.
Innovation Solution
A MAC system incorporating a circuit with resistors, capacitors, and a time-to-digital converter (TDC) that charges capacitors with input signals and converts the charge time into digital values, allowing for efficient accumulation and multiplication operations within an integrated memory and arithmetic unit, reducing the need for separate ADCs and improving data transmission rate and power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional MAC circuits use separate memory and arithmetic units, then data transmission rate is limited, but device area is reduced
Solution Approach 1:
The patent merges memory and arithmetic units into an integrated MAC circuit where resistors store weight data and simultaneously perform multiplication operations. This integration eliminates data transmission bottlenecks between separate memory and arithmetic units, significantly improving data transmission rate while the compact resistor-capacitor structure keeps device area manageable
2Measurement precision
If traditional MAC circuits use separate ADCs for each output line, then conversion precision is improved, but device complexity increases
Solution Approach 1:
The patent implements a shared TDC that serves multiple output lines simultaneously. The TDC converts charge time information from multiple capacitors into digital values through time-multiplexed operation, achieving adequate conversion precision for neural network applications while dramatically reducing device complexity compared to having separate ADCs for each output line
Solution Approach 2:
The patent introduces charge time information as an intermediary parameter between the analog charging process and digital output. By measuring the time required to charge capacitors to specific voltage thresholds and converting this time information digitally, the system achieves precise weight data representation without requiring complex direct analog-to-digital conversion circuits for each output
3Productivity
If MAC circuits perform vector matrix multiplication efficiently, then neural network performance is improved, but power consumption increases
Solution Approach 1:
The patent replaces traditional electronic switching and digital computation mechanisms with analog RC charging dynamics. The multiplication and accumulation operations are performed naturally through the charging of capacitors through resistors, where the charge time directly encodes the computational result. This analog approach significantly reduces power consumption compared to digital switching operations while maintaining efficient neural network processing capability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed MAC system enhances data transmission rate and power consumption while using less area, enabling improved performance in neural network operations by integrating memory and arithmetic functions, thus overcoming the limitations of traditional MAC circuits.
Implementation Method 1
a capacitor connected to the plurality of resistors to charge, in response to a plurality of input signals, the capacitor with electric charge
Data Source
AI summary
Provided is a multiplier-accumulator (MAC) system, circuit, and method. The MAC system includes a MAC circuit, including a plurality of resistors, having respective resistances, a capacitor connected to the plurality of resistors to charge, in response to a plurality of input signals, the capacitor with electric charge, and a time-to-digital converter (TDC) configured to convert information of a charge time of the capacitor, due to the electric charge, into a digital value, wherein the digital value is an accumulation result of the MAC circuit.