Time to Digital Converter Circuit Noise Filtering
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Solution Overview
Problem
Current Time-to-Digital-Converter (TDC) systems in photo detection, particularly for Time-of-Flight (ToF) sensors, face challenges with high ambient light noise leading to low signal-to-noise ratios and increased power consumption due to the need for complex circuitry and post-processing in Time-correlated Single Photon Counting (TCSPC) methods.
Innovation Solution
A circuit with an intermediate memory unit that stores time stamps between detection cycles for comparison, allowing only repeated time stamps to increment histogram bins, thereby filtering out noise and reducing memory and power consumption by using a simpler filtering operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If TCSPC is used to reduce noise by correlating SPAD detection events, then signal-to-noise ratio is improved, but device complexity and power consumption increase due to complex circuitry or powerful CPU post-processing
Solution Approach 1:
The patent introduces an intermediate memory unit as a mediator between the TDC and histogram memory. This memory unit stores time stamps from one detection cycle and enables comparison with subsequent cycles, allowing noise filtering through coincidence detection without requiring complex circuitry or powerful processors. The intermediate memory acts as a simple, low-power mediator that achieves TCSPC-like noise reduction functionality.
Solution Approach 2:
The patent creates a copy of time stamps from one detection cycle by storing them in the intermediate memory unit. This copied data is then compared with time stamps from subsequent detection cycles to identify coincident events. This copying approach enables noise filtering through simple comparison operations rather than complex processing, reducing both device complexity and power consumption while maintaining effective noise reduction.
2Reliability
If histogram memory is increased to store more detection events, then noise filtering capability is improved, but chip cost and memory space increase
Solution Approach 1:
The patent segments the memory function into two distinct parts: a small intermediate memory unit for storing time stamps from one detection cycle, and the main histogram memory for storing detection event counts. This segmentation allows the system to achieve effective noise filtering through time stamp comparison without requiring large amounts of histogram memory, thus reducing overall memory space requirements while maintaining noise filtering capability.
Solution Approach 2:
The intermediate memory unit serves as an intermediary structure that enables noise filtering functionality without requiring expansion of the main histogram memory. By storing and comparing time stamps from consecutive detection cycles, this intermediate structure provides the necessary noise filtering capability while keeping memory space usage minimal.
3Productivity
If ambient light levels are high, then more detection events occur, but signal-to-noise ratio deteriorates due to false detections in the histogram
Solution Approach 1:
The patent implements continuous comparison of time stamps across multiple consecutive detection cycles. By maintaining a running comparison between the intermediate memory contents and new time stamps, the system continuously identifies coincident events that represent true signals while filtering out random noise events. This continuous action maintains high detection event rates while improving signal-to-noise ratio through persistent coincidence verification.
Solution Approach 2:
The patent employs a feedback mechanism where time stamps from previous detection cycles (stored in intermediate memory) are continuously compared with new time stamps. This feedback loop allows the system to learn from past detections and selectively increment histogram bins only when coincident time stamps are identified, thereby maintaining high productivity while improving reliability by filtering out false detections from ambient light.
Data Source
AI summary
A circuit for time to digital conversion, the circuit comprises a time to digital converter, TDC, configured to receive trigger signals and event signals and, for each event signal, provide a time stamp indicative of a time period between the event signal and an associated trigger signal, a first memory unit for storing a set of time stamps associated with one trigger signal and provided by the TDC, and a processing unit configured to compare the set of time stamps stored in the first memory unit to new time stamps provided by the TDC to determine coincident time stamps.