TDD RF Front-End Bypass Circuitry for Carrier Aggregation
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Solution Overview
Problem
Conventional RF front end circuitry for carrier aggregation in TDD configurations experiences significant insertion loss during uplink transmission, limiting performance and reducing battery life due to the filtering requirements for simultaneous reception of signals across multiple bands.
Innovation Solution
The implementation of RF multiplexer circuitry coupled with bypass circuitry that bypasses the multiplexer during uplink timeslots, allowing direct transmission paths and reducing insertion loss, while using the multiplexer during downlink timeslots for simultaneous reception across multiple bands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If RF multiplexer circuitry is used for carrier aggregation in TDD configurations, then simultaneous reception of signals across multiple bands is achieved, but significant insertion loss occurs during uplink transmission
Solution Approach 1:
The patent implements dynamic switching of the RF front-end architecture based on TDD frame structure. During downlink reception periods, the multiplexer is activated to enable simultaneous reception across multiple bands. During uplink transmission periods, the multiplexer is bypassed to eliminate insertion loss. This dynamic reconfiguration resolves the contradiction by adapting the system architecture to the instantaneous operational mode.
Solution Approach 2:
The patent segments the RF front-end path into separate reception and transmission paths. The multiplexer is placed only in the reception path, while the transmission path has a direct bypass connection. This segmentation allows the multiplexer to be used for simultaneous multi-band reception without affecting uplink transmission performance, as the transmission signal bypasses the multiplexer entirely.
2Measurement precision
If filtering circuitry is used for carrier aggregation, then signal separation across multiple bands is achieved, but performance and battery life are reduced due to insertion loss
Solution Approach 1:
The filtering circuitry (multiplexer) is dynamically activated only during downlink reception periods when signal separation is needed. During uplink transmission periods, the filtering circuitry is bypassed, eliminating unnecessary energy consumption and insertion loss. This dynamic operation extends battery life while maintaining signal separation capability when required.
Solution Approach 2:
The patent utilizes the periodic TDD frame structure to alternately activate the filtering circuitry during downlink periods and bypass it during uplink periods. This periodic switching aligns the operation of the filtering circuitry with the actual need for signal separation, reducing overall energy consumption and extending battery life while maintaining aggregation functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces insertion loss during transmission, enhancing the overall performance and battery life of wireless communications devices by optimizing the RF front end circuitry for TDD carrier aggregation.
Implementation Method 1
The RF multiplexer circuitry is configured to pass RF signals within a first frequency band between the antenna node and a first one of the input/output nodes, while attenuating RF signals outside of the first frequency band. Further, the RF multiplexer circuitry is configured to pass RF signals about a second frequency band between the antenna node and a second one of the input/output nodes, while attenuating RF signals outside the second frequency band.
Data Source
AI summary
Circuitry includes an antenna node, a number of input/output nodes, radio frequency (RF) multiplexer circuitry, and bypass circuitry. The RF multiplexer circuitry is coupled between the input/output nodes and the antenna node. The bypass circuitry is coupled to the input/output nodes and the antenna node. The bypass circuitry is configured to, in each uplink time slot of a TDD frame, couple one of the input/output nodes directly to the antenna node such that the RF multiplexer circuitry is bypassed. Further, the bypass circuitry is configured to, in each downlink time slot of the TDD frame, couple each one of the input/output nodes to the antenna node via the RF multiplexer circuitry.


