TDD Time Slot Allocation for Serial Signal Latency
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Solution Overview
Problem
In communication systems using the TDD system, transmitting multiple serial signals complying with different standards between SerDeses leads to increased transmission latency due to suboptimal allocation of TDD time slots, especially when signals have varying transmission frequencies and amounts.
Innovation Solution
A communication apparatus and method that dynamically allocate TDD time slots and shift priorities of application packets within these slots to optimize transmission efficiency, ensuring that packets are transmitted in slots where they can be sent without delay and with minimal latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If TDD time slots are allocated at constant intervals to packets including serial signals having low transmission frequencies, then transmission scheduling is simplified, but transmission latency increases due to idle allocated time slots
Solution Approach 1:
The patent implements dynamic TDD time slot allocation where the transmission control section adjusts time slot assignments based on real-time transmission frequency requirements of different serial signals. Instead of fixed constant intervals, the system dynamically allocates time slots to match the actual transmission needs of high and low frequency signals, eliminating idle slots and reducing latency while maintaining manageable complexity through automated control.
2Loss of time
If TDD time slots are allocated to packets including serial signals having high transmission frequencies, then transmission latency is reduced, but transmission efficiency decreases when packets are not ready for transmission
Solution Approach 1:
The transmission control section continuously monitors the readiness status of application packets and uses this feedback to adjust TDD time slot allocation dynamically. When packets are ready for high-frequency transmission, time slots are allocated immediately to minimize latency. When packets are not ready, the system reallocates those time slots to other pending transmissions, maintaining high transmission efficiency without wasting capacity.
3Adaptability or versatility
If multiple types of serial signals complying with different standards are transmitted using TDD system, then communication compatibility is improved, but transmission latency increases due to packet conversion and suboptimal time slot allocation
Solution Approach 1:
The patent implements a universal packet conversion mechanism that translates multiple serial signal standards (SPI, GPIO, I2C) into a unified TDD-compatible packet format. The transmission control section then applies dynamic time slot allocation across all converted packets regardless of their original standard, ensuring that compatibility is maintained while latency is minimized through optimized scheduling of the universal packet structure.
Data Source
AI summary
Improved transmission efficiency with minimized latency is disclosed. In one example, a communication apparatus is configured to count an interval allocated in a TDD (Time Division Duplex) mode as one TDD time slot, with a plurality of the TDD time slots counted as one period. It periodically transmits, to a communication partner apparatus, multiple application packets corresponding to multiple serial signals generated by multiple applications. A specific TDD time slot is used for transmitting a portion of the application packets corresponding to at least two of the multiple applications on a prioritized basis.