TDDI Chip Pin Layout for Higher Touch-Display Integration

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Solution Overview

Problem

Existing touch display devices have a low integration degree due to the independent control of touch panels and display panels by separate chips, leading to inefficiencies and potential improvements in integration and connectivity.

Innovation Solution

A touch and display driver integration chip with specific arrangements of connection blocks and pins that facilitate high integration, including first and second output regions with defined angles and sequences for touch and data signal output, and a display panel with corresponding pin arrangements for efficient signal transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate chips are used to independently control touch panels and display panels, then each component can be controlled independently, but the integration degree of the device is low

Engineering Contradiction:
Improveindependent control capabilityVSAvoidintegration degree
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the touch driver chip and display driver chip into a single integrated TDDI chip. The chip includes both touch signal output interfaces and data signal output interfaces, allowing both touch panel and display panel to be controlled by one unified device, thereby increasing integration degree while maintaining independent control capabilities through separate output regions and connection blocks.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If multiple connection blocks are arranged in parallel columns, then signal transmission efficiency is improved, but the area occupied by the chip increases

Engineering Contradiction:
Improvesignal transmission efficiencyVSAvoidchip area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent transitions from a single-direction linear arrangement of connection blocks to a two-dimensional grid arrangement with rows and columns. Multiple connection blocks are arranged in N rows along the column direction, allowing signals to be transmitted through multiple parallel paths simultaneously, which improves transmission efficiency while utilizing the chip area more efficiently through spatial optimization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces asymmetric angular arrangements of connection block columns relative to the first direction, with included angles between 60° and 90°. This asymmetric positioning optimizes signal transmission paths and reduces interference between adjacent connection blocks, improving transmission efficiency without requiring proportional increases in chip area.

Inventive Principle:
Principle #4Asymmetry

3Measurement precision

If connection blocks are arranged with specific angular orientations, then signal transmission precision is improved, but the manufacturing complexity increases

Engineering Contradiction:
Improvesignal transmission precisionVSAvoidmanufacturing complexity
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The patent specifies precise angular parameters for connection block arrangements, with included angles between the column direction and first direction constrained to 60°-90°. These parameter specifications optimize signal transmission precision by reducing interference and improving alignment, while the standardized angular ranges facilitate manufacturing by providing clear design guidelines rather than requiring complex custom angles.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20260086669A1Touch and Display Driver Integration Chip, Display Panel and Display Device
Publication Date: 2026.03.26 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US20260086669A1 patent drawing
  • US20260086669A1 patent drawing
  • US20260086669A1 patent drawing

AI summary

A touch and display driver integration chip has a first output region including a first connection region, a second connection region and a third connection region arranged in sequence along a first direction parallel to a length direction of the chip. The chip includes first connection blocks arranged in the first output region. The first connection blocks are arranged in multiple columns, with a column direction intersecting the first direction, an included angle formed by the two directions being greater than or equal to 60° and less than or equal to 90°. The first connection blocks include first touch connection blocks and data connection blocks. The first touch connection blocks are divided into two groups respectively in the first and third connection regions, and are configured to output first touch signals. The data connection blocks are arranged in the second connection region, and are configured to output data signals.