TDEC Testing With Staged FFE-DFE Equalization for SER Accuracy

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Solution Overview

Problem

Current TDEC test receivers have weaker equalization capabilities than real receivers in actual systems, leading to poor performance in severe signal impairment scenarios, particularly in next-generation optical communication networks.

Innovation Solution

Implement a method that combines first and second equalization processing using tap coefficients, and incorporates decision feedback equalizer (DFE) error propagation considerations to estimate a target symbol error rate (SER) without initial error propagation, adjusting noise to achieve the desired SER threshold.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the TDEC test receiver uses only FFE for equalization processing, then the device complexity is kept relatively low, but the equalization capability is insufficient for severe signal impairment scenarios

Engineering Contradiction:
Improveequalization capabilityVSAvoidequalization processing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines FFE and DFE into a unified equalization processing system. The FFE processes the received signal to compensate for inter-symbol interference, while the DFE uses decision feedback to further improve equalization performance. This merging of two equalization techniques resolves the contradiction by achieving superior equalization capability (improving reliability) while maintaining manageable device complexity through integrated design.

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If the TDEC test receiver uses DFE with error propagation consideration, then the SER estimation accuracy is improved, but the calculation complexity increases

Engineering Contradiction:
ImproveSER estimation accuracyVSAvoidcalculation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent performs preliminary equalization processing using FFE before DFE to reduce the impact of error propagation. By pre-compensating for inter-symbol interference, the initial signal quality is improved, which reduces the magnitude of error propagation in subsequent DFE processing. This preliminary action resolves the contradiction by achieving accurate SER estimation while controlling calculation complexity through staged processing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The DFE uses feedback from previous symbol decisions to improve current symbol detection accuracy. The decision feedback mechanism allows the system to compensate for inter-symbol interference caused by previous errors, thereby improving SER estimation accuracy. The feedback loop is designed to manage computational load, resolving the contradiction between precision and complexity.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If the equalization processing is enhanced to match actual system receivers, then the adaptability to severe signal impairment is improved, but the device complexity increases

Engineering Contradiction:
Improveadaptability to signal impairmentVSAvoidreceiver structure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements adaptive equalization where the FFE and DFE coefficients are dynamically adjusted based on the received signal characteristics. This dynamic adaptation allows the receiver to optimize its equalization capability for different signal impairment conditions without requiring a completely different receiver structure. The dynamic parameter adjustment resolves the contradiction by providing high adaptability while maintaining a unified receiver architecture.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250219726A1Method for Testing TDEC and Related Device
Publication Date: 2025.07.03 HUAWEI TECH CO LTD
  • US20250219726A1 patent drawing
  • US20250219726A1 patent drawing
  • US20250219726A1 patent drawing

AI summary

A method for testing a TDEC, where the method includes: obtaining a to-be-tested signal obtained through channel transmission of an original signal transmitted by a transmitter; performing first equalization processing on the to-be-tested signal based on at least one first tap coefficient to obtain a first signal; obtaining a product of a level corresponding to the original signal and a second tap coefficient, and performing second equalization processing on the first signal based on the product to obtain a second signal; obtaining an eye pattern of the second signal, and performing sampling at a target position of the eye pattern to obtain a third signal; obtaining a target symbol error rate (SER) obtained by superimposing target noise on the third signal; and adjusting the target noise based on a SER threshold to adjust the target SER.