CMOS TDI Imaging Offset Integration Readout
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Solution Overview
Problem
CMOS image sensors face challenges in implementing Time Delay Integration (TDI) due to the need for additional circuitry, which reduces fill factor and quantum efficiency, and introduces parasitic light sensitivity and modulation transfer function degradation.
Innovation Solution
The integration period start times of each column in the pixel array are offset from one another, with a repeating pattern or physical offset to compensate for relative movement, allowing for simultaneous readout of multiple columns using diagonally arranged readout buses and sample-and-hold circuits to integrate signals from a common subject element.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If snapshot shutter capability is added to CMOS pixels for TDI operation, then TDI functionality is achieved, but fill factor and quantum efficiency are reduced
Solution Approach 1:
The patent extracts the sample-and-hold circuitry from the pixel structure itself and places it in a separate dedicated TDI circuit block. This separation removes the harmful circuit elements from the pixel area, preserving fill factor while maintaining TDI functionality through external signal processing.
Solution Approach 2:
The patent introduces dedicated TDI circuitry as an intermediary component that receives signals from multiple pixels and performs the integration function externally. This mediator handles the sample-and-hold operations without requiring in-pixel circuitry, thus preserving pixel area while achieving TDI operation.
2Adaptability or versatility
If sample-and-hold circuitry is added to each pixel for signal memorization, then TDI operation is enabled, but parasitic light sensitivity increases
Solution Approach 1:
The patent extracts the sample-and-hold circuitry from the pixel structure and relocates it to dedicated external TDI circuits. This removal eliminates the source of parasitic light sensitivity from within the pixel area while preserving the necessary signal memorization function in the external processing circuitry.
3Measurement precision
If in-pixel sampling is implemented for each ground pixel, then motion artifacts are reduced, but device complexity increases
Solution Approach 1:
The patent segments the TDI functionality into dedicated separate circuits rather than implementing it in every pixel. Multiple pixels share common TDI circuitry, reducing overall device complexity while maintaining precise sampling capabilities for motion artifact reduction through external signal processing.
Solution Approach 2:
The patent creates universal TDI circuits that serve multiple pixels simultaneously. These shared circuits perform sampling and integration functions for all pixels in the array, reducing per-pixel complexity while maintaining the precision needed for motion artifact reduction through centralized signal processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the signal-to-noise ratio and reduces motion artifacts, improving image quality while maintaining a high fill factor and quantum efficiency, suitable for applications like machine vision and aerial imaging.
Implementation Method 1
Each pixel element comprises a photodiode
Data Source
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AI summary
An imaging device for time delay integration (TDI) imaging of a subject 28. The imaging device comprises a two-dimensional array of pixels 30. The pixels 30 are arranged in columns. Each column is aligned with the direction of relative movement 22 between the imaging device and the subject 28. Pixels comprise a photo-sensitive element which is responsive to radiation during an integration period. Control circuitry is arranged to control the pixels in the array such that the pixels 30 in a column of the array are simultaneously exposed to radiation over a common integration period, with a start time of an integration period of the column of the array being offset from a start time of an integration period of at least one other column of the array. Columns of pixels 30 can be physically offset from one another. Readout buses 33 can be provided diagonally across the array to allow multiple columns to be simultaneously read.