Backplane Interface Pin Count Reduction via TDM Multiplexing
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Solution Overview
Problem
Conventional telecommunications systems face increased routing complexity and cost due to high pin counts on backplane interfaces, which complicates system design and expansion, especially for network interface and controller cards.
Innovation Solution
The system architecture employs MapMux devices connected to TDM buses and selection units to multiplex and de-multiplex control and status signals, reducing the need for separate pins by transmitting multiple signals over a single pin using time slots on the TDM bus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate pins are used for each control and status signal between line cards and controller cards, then signal transmission reliability is improved, but pin count and routing complexity increase significantly
Solution Approach 1:
Multiple control and status signals that were previously transmitted through separate pins are merged into a single TDM bus. The bus carries multiplexed signals representing multiple original signals, thereby reducing pin count while maintaining complete signal transmission capability between line cards and controller cards.
Solution Approach 2:
The TDM bus employs periodic time slots to transmit different control and status signals sequentially. Each signal is assigned specific time slots in a repeating cycle, allowing multiple signals to be transmitted over a single pin through time-division multiplexing, thus reducing hardware complexity while preserving signal integrity.
2Reliability
If redundant controller cards are implemented to avoid single point of failure, then system reliability is improved, but pin requirements and controller card complexity increase
Solution Approach 1:
The TDM bus consolidates multiple control and status signal pathways into a single communication channel. This allows redundant controller cards to exchange signals through the shared bus rather than requiring separate dedicated pins for each signal, reducing the pin count burden on each controller card while maintaining redundant failover capability.
3Adaptability or versatility
If more control and status signals are added to line cards, then system functionality and monitoring capability are improved, but pin count and cost increase
Solution Approach 1:
Additional control and status signals are accommodated by allocating them specific time slots within the TDM bus cycle. This periodic time-division approach allows the system to expand functionality and monitoring capability by adding signals without increasing pin count, as all signals share the same physical transmission medium through time-multiplexed access.
Data Source
AI summary
The present disclosure discloses a system architecture and method for reducing pin count on a backplane connecting plurality of devices. In an embodiment, the signals from the plurality of devices are multiplexed or mapped into time slots using a MapMux device. The MapMux device then sends the multiplexed or mapped signals over backplane on TDM bus. The MapMux device at the receiving end de-multiplexes or de-maps and sends the received signals to plurality of devices for further processing. The present disclosure allows a large number of signals to be passed between the devices through a single stream.