Double Buffered TDM Switch Memory Extensions

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Solution Overview

Problem

TDM switches with constant delay features face challenges in ensuring data availability within a fixed number of frames due to varying data rates and fractional delays, leading to potential delays of up to two frames, which traditional methods like additional memory instances or multiple small buffers cannot efficiently address, especially in high-channel-count systems.

Innovation Solution

A double buffered data memory with extensions, where the main data memory stores frames as they become available and additional small SRAM extensions hold residual data from slower streams, allowing controlled switching to maintain a two-frame delay across all connection paths, even with multi-rate and fractional delay settings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a second data memory instance is used to store data for slower streams, then data availability for constant delay is improved, but memory size and device complexity increase

Engineering Contradiction:
Improvedata availabilityVSAvoidmemory size
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The data memory is segmented into main buffer portions for storing complete frames and extension buffer portions for storing residual data from slower streams. This segmentation allows the system to handle multi-rate streams with different delay requirements using a single unified memory structure, avoiding the need for separate memory instances for each stream type.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different portions of the data memory have different functions: main buffer portions store complete frames for normal processing, while extension buffer portions store residual data from slower streams. This local differentiation allows each memory portion to be optimized for its specific purpose, improving overall data availability without proportionally increasing total memory size.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If multiple small buffer instances are used for different streams, then data rate adaptability is improved, but device complexity and memory overhead increase

Engineering Contradiction:
Improvedata rate adaptabilityVSAvoidbuffer management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The data memory structure is designed to be universal, handling both normal-rate streams and slower streams within the same memory framework. The memory can operate in different modes (single-buffered or double-buffered) depending on the stream characteristics, providing multi-functionality without requiring separate specialized buffers for each stream type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The buffer switching mechanism is made dynamic and configurable. The system can switch between single-buffered and double-buffered operation modes based on the specific stream requirements. This dynamic adaptability allows the same memory structure to efficiently handle varying data rates and delay requirements without manual reconfiguration or multiple fixed buffer instances.

Inventive Principle:
Principle #15Dynamics

3Productivity

If double buffering is used for all streams, then throughput is improved, but memory size increases unnecessarily for faster streams

Engineering Contradiction:
ImprovethroughputVSAvoidmemory size
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

Instead of applying double buffering uniformly to all streams, the system applies buffering selectively: main buffer portions use double buffering for frames, while extension buffer portions use single buffering for residual data from slower streams. This partial application of buffering ensures high throughput for normal streams while minimizing memory usage for streams that don't require full double buffering.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS7492778B2Data memory extension for use in double buffered TDM switches
Publication Date: 2009.02.17 ZARLINK SEMICONDUCTOR INC
  • US7492778B2 patent drawing
  • US7492778B2 patent drawing
  • US7492778B2 patent drawing

AI summary

A time division multiplex switch supporting multi-rate input and output serial data streams has a double-buffered data memory with buffer extensions associated respectively with each portion of the memory. The extensions store residual data for a delay period after the main portion of the double-buffered data memory has switched.