TDMA Power Amplifier Timing Control for PVT Across PCLs
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Solution Overview
Problem
Power amplifiers for time division multiple access often fail to satisfy power vs time (PVT) requirements across all power control levels (PCLs), leading to degraded performance, particularly at high PCLs due to incorrect timing control.
Innovation Solution
A power amplifier configuration that includes a power control unit, switching unit, and timing control unit, where the timing control unit determines the turn-on time of the power logic enable signal by comparing an output signal with a reference voltage, ensuring the power amplifier meets PVT standards across all PCLs by adjusting the switching pass.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the power logic enable signal location setting is fixed, then the circuit complexity is reduced, but the PVT requirements cannot be satisfied across all power control levels
Solution Approach 1:
The patent implements dynamic timing adjustment by introducing a timing control unit that varies the turn-on timing of the power logic enable signal based on different power control levels. The timing adjustment signal dynamically modifies the enable signal timing according to the current PCL, allowing the system to adapt timing parameters without changing the fundamental circuit structure, thus satisfying PVT requirements across all power levels while maintaining circuit simplicity.
Solution Approach 2:
The patent changes the timing parameter of the power logic enable signal dynamically. By adjusting the turn-on timing parameter based on power control level, the system optimizes performance for different power conditions. The timing control unit generates adjusted enable signals with different timing characteristics for different PCLs, resolving the contradiction between fixed circuit design and variable performance requirements.
2Productivity
If the turn-on time of power logic enable signal is not adjusted, then the device operation is simple, but the performance degrades at high power control levels
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing optimal timing values for different power control levels in a lookup table. Before actual power amplification, the timing control unit retrieves the appropriate timing adjustment signal based on the current PCL and applies it to the power logic enable signal. This preliminary timing preparation ensures optimal performance at each power level without adding complex real-time calculation requirements during operation.
Data Source
AI summary
Disclosed herein is a power amplifier for time division multiple access. The power amplifier for time division multiple access includes: power amplifiers power-amplifying input transmission signals and outputting the amplified signals; a power control unit using a time division multiple access type to control amplification of the power amplifiers; a switching unit formed at output terminals of the power amplifiers and the power control unit and outputting the amplified signals to an antenna based on a switching pass determined by the power control unit; and a timing control unit formed at an input terminal of the power control unit and determining turn-on time of a second signal by a level of an output signal generated by comparing a first signal with reference voltage.