T-Shaped Gate HV-LDMOS Transistor Breakdown Voltage
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Solution Overview
Problem
Conventional high voltage lateral double-diffused metal-oxide-semiconductor (HV-LDMOS) transistor devices face a trade-off between achieving high breakdown voltage and low ON-resistance (RON), as these parameters are conflicting and difficult to optimize simultaneously.
Innovation Solution
The introduction of a recess in the isolation structure filled with a second gate portion extending from the first gate portion, forming a T-shaped gate that increases the current path and charge accumulation area, thereby enhancing breakdown voltage without increasing RON, and optionally incorporating finger portions to further improve electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the drift region is designed with low dope concentration and large area to achieve high breakdown voltage, then the breakdown voltage is improved, but the ON-resistance increases
Solution Approach 1:
The gate structure transitions from a conventional planar configuration to a three-dimensional T-shaped configuration by extending the gate downward into the drift region. This dimensional change increases the effective gate area and charge accumulation volume without expanding the lateral footprint, thereby improving breakdown voltage while maintaining low ON-resistance
Solution Approach 2:
The second gate portion is nested within the isolation structure, specifically formed in a recess of the field oxide layer. This nesting approach allows the gate to extend into the drift region without increasing the overall device area, enabling enhanced voltage handling capability while preserving the low resistance path
2Reliability
If the gate area is increased to improve breakdown voltage, then the breakdown voltage is improved, but the device area increases
Solution Approach 1:
The gate structure utilizes the vertical dimension by extending downward into the drift region through a recess in the field oxide layer. This vertical extension increases the effective gate area and charge accumulation volume without increasing the lateral device footprint, resolving the contradiction between breakdown voltage improvement and area constraint
Data Source
AI summary
A high voltage metal-oxide-semiconductor transistor device includes a substrate, at least an isolation structure formed in the substrate, a gate formed on the substrate, and a source region and a drain region formed in the substrate at respective sides of the gate. The isolation structure further includes a recess. The gate includes a first gate portion formed on a surface of the substrate and a second gate portion downwardly extending from the first gate portion and formed in the recess.