Clock Synchronization Error Estimation via TDOA
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Solution Overview
Problem
Clock synchronization errors between sensors lead to inaccurate signal processing and increased computational resources, especially when active synchronization is not possible or practical due to cost or logistical constraints.
Innovation Solution
A method using estimated uncorrected time-difference-of-arrival (TDOA) to calculate clock synchronization error (CSE) ranges, allowing for compensation without active synchronization, by determining the range of possible TDOAs and combining multiple measurements to narrow the CSE range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If active synchronization of clocks is implemented, then clock synchronization accuracy is improved, but system complexity and cost increase
Solution Approach 1:
The patent introduces a computational intermediary (the CSE estimation algorithm) that mediates between the unsynchronized clocks and the signal processing operations. Instead of directly synchronizing clocks through complex hardware or communication protocols, the system uses TDOA measurements as an intermediary to estimate clock offset and applies this estimate to correct timing errors in signal processing, achieving synchronization accuracy without active clock synchronization mechanisms
Solution Approach 2:
The patent replaces the mechanical/physical clock synchronization system (hardware-based time transfer, atomic clocks, GPS discipling) with a computational approach using signal processing and statistical estimation. The mechanical act of synchronizing clocks is substituted by algorithmic correction of time stamps using estimated CSE derived from TDOA measurements of ambient signals
2Device complexity
If clock synchronization errors are not corrected, then system simplicity is maintained, but signal processing accuracy deteriorates
Solution Approach 1:
The patent performs preliminary estimation of clock synchronization error using TDOA measurements before the actual signal processing operations. By calculating the CSE range in advance based on uncorrected TDOA data and sensor locations, the system prepares correction factors that are then applied to subsequent signal processing tasks, ensuring accuracy without requiring continuous active synchronization during operation
3Reliability
If larger temporal windows are used to account for clock uncertainties, then signal detection reliability is improved, but computational resources increase
Solution Approach 1:
The patent dynamically adjusts the temporal window parameter based on the estimated CSE range. Instead of using fixed large windows to guarantee signal detection, the system calculates the minimum necessary window size using the formula: window = |minTDOA - maxTDOA| + safety_margin, where TDOA values are corrected using the estimated CSE. This parameter optimization maintains signal detection reliability while minimizing computational resource consumption by processing only the necessary time span
Data Source
AI summary
A method implemented using a programmed computerized machine includes using an estimated uncorrected time-difference-of-arrival (TDOA) for a first signal at first and second sensors, located at first and second sensor locations and coupled to first and second clocks, to calculate a first estimated clock synchronization error (CSE) range that extends (i) from an estimated minimum true TDOA between the sensor locations minus an estimated maximum uncorrected TDOA, (ii) to an estimated maximum true TDOA between the sensor locations minus an estimated minimum uncorrected TDOA. Additional estimated CSE ranges based on additional signals can be used to calculate an estimated cumulative CSE range. A first or cumulative estimated CSE range can be used for calculations with respect to time-dependent signals arriving at one or both sensors, or for adjusting one or both clocks.