TDP Power Efficiency Simulation for Integrated Circuits
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Solution Overview
Problem
Conventional methods for measuring thermal design point (TDP) power efficiency in integrated circuits, such as clock gating percentage, fail to distinguish between efficient and inefficient designs, as they do not account for the actual functionality of clock-gating logic during periods of inactivity.
Innovation Solution
A method involving simulation of input vectors on a model of the integrated circuit to generate power consumption data for both high-activity and extended periods, allowing for the calculation of TDP power efficiency that reflects the actual efficiency of power-saving techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If clock gating percentage is used to measure TDP power efficiency, then measurement simplicity is improved, but measurement precision deteriorates
Solution Approach 1:
The patent replaces the mechanical counting method (simple flip-flop counting or RTL enable signal evaluation) with a simulation-based measurement system. This substitution uses dynamic power consumption data from simulations to calculate TDP power efficiency, providing a more accurate measurement that reflects actual power-saving behavior during idle periods while maintaining a systematic measurement process.
2Ease of manufacture
If conventional clock gating percentage methods are used, then ease of manufacture is improved, but reliability of efficiency assessment deteriorates
Solution Approach 1:
The patent implements a feedback mechanism where simulation results provide actual power consumption data that feeds into the TDP power efficiency calculation. This feedback loop allows the measurement system to account for the actual functionality of clock-gating logic during idle periods, ensuring that the efficiency assessment reliably reflects the true power-saving performance of the integrated circuit design.
Data Source
AI summary
A technique for determining thermal design point (TDP) power efficiency for an integrated circuit is disclosed. A simulation executes a set of input vectors on a model of an integrated circuit to generate a first estimated power consumption data during a first number of clock cycles. A simulation executes the set of input vectors on a model of an integrated circuit to generate a second estimated power consumption data during a second number of clock cycles. TDP power efficiency for the integrated circuit is calculated based on the first estimated power consumption data and the second estimated power consumption data.