Time Division Peak Power Management for Non-Volatile Memory
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Solution Overview
Problem
Non-volatile semiconductor memory systems face limitations in peak current management due to power and current constraints from host devices, leading to potential operation failures and reduced system performance, as existing techniques either burden the memory controller or increase communication overhead.
Innovation Solution
Implementing Time Division Peak Power Management (TD-PPM) where each semiconductor die is allocated a specific time slot for high current portions of memory operations, allowing them to halt and resume operations accordingly, thereby spreading out current usage without overloading the communication link or burdening the memory controller.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple memory dies are operated in parallel to increase performance, then system throughput is improved, but peak current consumption increases beyond host device limits
Solution Approach 1:
The patent implements time-division multiplexing where memory dies are allocated specific time slots for high-current operations. Each die alternates between active programming phases and idle periods, creating periodic current consumption patterns that prevent peak current overload while maintaining overall system throughput through coordinated parallel operation across multiple dies.
2Power
If memory dies stop before each program pulse waiting for go commands, then current consumption is controlled, but system performance drops and communication channel is taxed
Solution Approach 1:
The memory controller pre-coordinates operation schedules for multiple dies before programming begins. Time slots are allocated in advance to each die based on current budget constraints, allowing dies to execute programming operations autonomously during their allocated slots without continuous polling or waiting for go commands, thus maintaining performance while controlling current consumption.
3Power
If ZQ pin calibration is used to control current consumption, then peak current budget is managed, but overhead and complexity increase
Solution Approach 1:
Each memory die autonomously monitors its own current consumption and automatically adjusts its operation schedule based on allocated time slots and current budget. The system self-regulates current usage through distributed intelligence at the die level rather than requiring complex centralized control or additional calibration pins, reducing overall system complexity while maintaining peak current budget management.
Data Source
AI summary
Time division peak power management in non-volatile memory systems is disclosed. The memory system has a memory controller and a number of semiconductor dies. Each die is assigned a time slot in which to perform high current portions of memory operations. The memory controller provides an external clock to each die. Each die tracks repeating time slots based on the external clock. The memory controller may synchronize this tracking. If a die is about to perform a high current portion of a memory operation, the die checks to determine if its allocated slot has been reached. If not, the die halts the memory operation until its allocated time slot is reached. When the allocated time slot is reached, the halted memory operation is resumed at the high current portion. Therefore, the high current portion of the memory operation occurs during the allocated time slot.