Plan-View TEM Sample Preparation Using FIB and Carrier Transfer
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Solution Overview
Problem
The existing methods for preparing plan-view TEM samples in integrated circuit analysis often damage the rest of the chip during the cross-section preparation process, making subsequent analyses difficult or impossible.
Innovation Solution
A method using a carrying slice as a transition medium to isolate and transfer the targeted chip structure using a focused ion beam, allowing for precise removal of layers without damaging the surrounding chip, and then welding the sample onto a TEM copper grid.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the sample is cleaved or polished to make the cross section close to the target region, then the TEM sample preparation can be completed, but a large amount of region on the chip is completely removed causing subsequence analyses difficult or impossible
Solution Approach 1:
The chip is divided into two parts: a small region containing the target structure that is processed for TEM analysis, and the remaining chip that is preserved for future analyses. The FIB is used to precisely separate these segments, allowing the target region to be extracted and mounted on a carrier while leaving the rest of the chip intact.
Solution Approach 2:
The target region containing the structure to be inspected is extracted from the chip using FIB cutting. This extracted region is then mounted on a carrier for TEM sample preparation, while the remaining chip is preserved and can be used for subsequent analyses without damage.
2Ease of manufacture
If the FIB is used to cut and prepare the planar TEM sample, then the sample preparation can be completed, but the rest of the chip is severely damaged
Solution Approach 1:
The FIB processing is applied locally only to the small region containing the target structure, rather than processing the entire chip. This localized approach allows precise sample preparation while preserving the quality and integrity of the remaining chip for future use.
Solution Approach 2:
A carrier is introduced as an intermediary substrate to receive the extracted target region. This carrier serves as a transition medium, allowing the FIB-processed region to be separated from the main chip and prepared for TEM analysis without damaging the original chip structure.
3Measurement precision
If the target region is exposed by removing surrounding material, then the TEM analysis can be performed, but subsequent analyses on other regions become difficult or impossible
Solution Approach 1:
The chip is segmented into the target region for TEM analysis and the remaining region for future analyses. By using FIB to precisely cut and separate these segments, the target region can be prepared for high-precision TEM measurement while the remaining chip preserves its integrity for subsequent versatile analyses.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the preparation of plan-view TEM samples without severely damaging the rest of the chip, facilitating subsequent analyses, reducing preparation difficulties and costs, and improving analysis efficiency and quality.
Implementation Method 1
Generally, metal, silicon oxide layer or metal deposition layer is selectively stripped by a physical sputtering method with a chemical gas reaction.
Implementation Method 2
The FIB is to generate a secondary electron signal by irradiating the surface of the sample with an ion beam which is generated from a liquid metal (Ga) ion source
Implementation Method 3
The FIB is to generate a secondary electron signal by irradiating the surface of the sample with an ion beam
Implementation Method 4
welding the piece of chip structure on the flat and clean side of the carrying slice
Implementation Method 5
The FIB is to generate a secondary electron signal by irradiating the surface of the sample with an ion beam which is generated from a liquid metal (Ga) ion source, accelerated and focused by an ion gun
Data Source
AI summary
The present invention discloses a preparation method of plan-view TEM sample used in an integrated circuit analysis. The method comprises the steps of: providing a carrying slice, and fixing a chip containing a targeted structure sample and the carrying slice on a sample holder in a horizontal direction, and putting them in a process chamber of a FIB apparatus; cutting off a piece of chip structure containing a target structure sample by adopting a FIB; and welding the piece of chip structure on the flat and clean side of the carrying slice by using a nano-manipulator; after being taken out from the process chamber of the FIB apparatus, the carrying slice welded with the chip structure is adjusted to vertical direction, and is put in the process chamber of the FIB apparatus again; transferring and welding the chip structure on the TEM copper grid by using the nano-manipulator; and removing one layer or multiple layers above the preset target layer from the surface layer of the chip by using the FIB to obtain the desired plan-view TEM sample.