Temperature Sense Diode Vertical Stacking for Piezoresistance
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Solution Overview
Problem
Conventional semiconductor devices with temperature sense diodes experience low accuracy in temperature sensing due to significant changes in electric resistance caused by the piezoresistance effect, which are influenced by thermal expansion stress applied in the planar direction.
Innovation Solution
A semiconductor device with a temperature sense diode where the anode, p-type semiconductor layer, and n-type semiconductor layer are stacked along the thickness direction of the semiconductor substrate, allowing current to flow orthogonally to the stress, minimizing the impact of the piezoresistance effect and maintaining accurate temperature sensing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the p-type semiconductor layer and n-type semiconductor layer are arranged adjacent to each other in the planar direction to form a temperature sense diode, then the device structure is simple and current flow path is short, but the electric resistance changes greatly due to piezoresistance effect caused by thermal expansion stress, resulting in low temperature sensing accuracy
Solution Approach 1:
The patent transitions the temperature sense diode structure from a planar arrangement (adjacent p-type and n-type layers in the planar direction) to a vertical stacking arrangement (layers stacked along the thickness direction). This dimensional change reorients the current flow path to be substantially orthogonal to the thermal expansion stress direction, minimizing piezoresistance effects while maintaining structural simplicity.
2Ease of manufacture
If the p-type semiconductor layer and n-type semiconductor layer are arranged adjacent to each other in the planar direction, then the manufacturing process is conventional, but the thermal expansion stress applies primarily in the planar direction causing great change in electric resistance due to piezoresistance effect
Solution Approach 1:
The patent stacks the anode electrode, p-type semiconductor layer, n-type semiconductor layer, and cathode electrode along the thickness direction of the semiconductor substrate. This vertical stacking configuration changes the current flow direction to be orthogonal to the planar thermal expansion stress, thereby stabilizing the electric resistance against piezoresistance effects while remaining compatible with conventional manufacturing processes.
3Measurement precision
If the temperature sense diode is fixed on the semiconductor substrate with layers stacked along the thickness direction, then the current flows orthogonally to the thermal expansion stress minimizing piezoresistance effect, but the electric resistivity of electrodes must be lower than semiconductor layers to minimize resistance change
Solution Approach 1:
The patent specifies that the electric resistivity of the anode electrode or cathode electrode (whichever is closer to the semiconductor substrate) must be lower than the electric resistivity of the n-type and p-type semiconductor layers. This parameter constraint ensures that electrode resistance changes due to piezoresistance effect are minimized, thereby maintaining high temperature sensing accuracy in the vertically stacked configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures minimal change in electric resistance of the temperature sense diode, maintaining a high correlation between temperature and forward voltage drop, thus enhancing the accuracy of temperature sensing.
Implementation Method 1
A forward voltage drop of the temperature sense diode changes due to temperature. Therefore, a temperature of the semiconductor substrate can be sensed by sensing the forward voltage drop of the temperature sense diode.
Implementation Method 2
A rise in the temperature of the semiconductor substrate causes the semiconductor substrate to thermally expand. This causes stress to be generated inside the temperature sense diode fixed on the semiconductor substrate.
Implementation Method 3
Such application of stress to the p-type semiconductor layer and the n-type semiconductor layer of the temperature sense diode causes changes in electric resistance of the p-type semiconductor layer and the n-type semiconductor layer due to the piezoresistance effect.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate; and a temperature sense diode fixed on the semiconductor substrate. The temperature sense diode includes: an anode electrode; a p-type semiconductor layer being in contact with the anode electrode; an n-type semiconductor layer being in contact with the p-type semiconductor layer; and a cathode electrode being in contact with the n-type semiconductor layer; and the anode electrode. The p-type semiconductor layer, the n-type semiconductor layer, and the cathode electrode are stacked along a thickness direction of the semiconductor substrate. An electric resistivity of the anode electrode or the cathode electrode whichever is located closer to the semiconductor substrate is lower than an electric resistivity of the n-type semiconductor layer and an electric resistivity of the p-type semiconductor layer.