Templated High-K Dielectric Materials via Combinatorial Screening

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Solution Overview

Problem

Current processes for developing electronic and optoelectronic devices are serial, time-consuming, and costly, particularly when preparing high-κ materials like Ba,Sr)TiO3 and TiO2, which require high-temperature annealing and result in inefficient dielectric performance due to interfacial layers and structural integrity issues.

Innovation Solution

The implementation of High Productivity Combinatorial (HPC) methods, which involve defining discrete site-isolated regions on a substrate to vary process parameters such as material amounts, temperatures, and deposition techniques, allowing for the rapid evaluation of process conditions to achieve desired crystalline structures and electrical properties in high-κ dielectric materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high-temperature annealing (400-750°C) is used to form BST with high dielectric constant, then the dielectric constant is improved, but interfacial layers are introduced due to oxidation of base-metal electrodes, resulting in high EOT and reduced effectiveness

Engineering Contradiction:
Improvedielectric constantVSAvoidinterfacial layers
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A template layer comprising RuO2 is introduced as an intermediary between the base-metal electrode and the BST dielectric layer. This template layer serves as a protective barrier that prevents oxidation of the base-metal electrode during high-temperature annealing while maintaining lattice matching to promote BST crystallization. The template layer acts as a mediator that enables the formation of high-quality BST interfaces without direct contact between the reactive base-metal electrode and oxidizing atmosphere.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If serial process development methods are used to prepare templated materials, then each material system can be thoroughly evaluated, but the process is time-consuming and costly, requiring many substrates and numerous deposition experiments

Engineering Contradiction:
Improvematerial evaluation accuracyVSAvoidprocess development speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The substrate surface is divided into multiple discrete site-isolated regions, with each region serving as an independent experimental platform. Different template layer materials, thicknesses, or deposition parameters can be applied to different regions, allowing parallel evaluation of multiple material systems and process conditions on a single substrate. This segmentation enables high-throughput screening of templated material systems without requiring separate substrates for each experiment.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple deposition experiments and material evaluations are combined into a single substrate processing run. By defining discrete site-isolated regions on one substrate and applying different process parameters to each region, the method merges what would traditionally require multiple separate substrates and sequential experiments into one integrated process development step, significantly improving productivity while maintaining evaluation accuracy.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If TiO2 thin films are grown by physical vapor deposition or chemical vapor deposition, then the films can be deposited, but they usually have anatase or amorphous structures with moderately high dielectric constant, and high temperature annealing above 700°C is required to transform to rutile phase, causing structural integrity problems

Engineering Contradiction:
Improvedielectric constantVSAvoidannealing temperature
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

A template layer with rutile crystal structure is formed beforehand on the substrate before depositing the TiO2 film. This pre-formed template provides a crystallographic template that guides the epitaxial growth of TiO2 in the rutile phase during deposition, eliminating the need for subsequent high-temperature annealing to transform from anatase or amorphous phases. The preliminary template structure directs the phase formation at lower temperatures, preserving structural integrity.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces the time and cost associated with developing templated materials by enabling the rapid screening of process parameters, improving the dielectric performance of high-κ materials and reducing structural defects, thereby enhancing the efficiency of semiconductor device production.

Implementation Method 1

a first layer is formed on one of the discrete SIRs, such that the first layer promotes formation of a desired crystalline structure in a second layer formed on the first layer

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Implementation Method 2

The as-deposited rutile TiO2 films have been formed only in a few systems with substrates such as oxidized noble metals (Ru and Ir) or RuO2 and insulating single-crystal oxides

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 3

TiO2 thin films grown by both physical vapor deposition and chemical vapor deposition usually have anatase or amorphous structures

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Data Source

PatentUS8865484B2Methods for forming templated materials
Publication Date: 2014.10.21 INTERMOLECULAR INC
  • US8865484B2 patent drawing
  • US8865484B2 patent drawing
  • US8865484B2 patent drawing

AI summary

Methods of forming layers can comprise defining a plurality of discrete site-isolated regions (SIRs) on a substrate, forming a first layer on one of the discrete SIRs, forming a second layer on the first layer, measuring a lattice parameter or an electrical property of the second layer, The process parameters for the formation of the first layer are varied in a combinatorial manner between different discrete SIRs to explore the possible layers that can result in suitable lattice matching for second layer of a desired crystalline structure.