Temporal Redundancy Circuit for IC Error Detection Without Duplication
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Solution Overview
Problem
Implementing redundancy in hardware integrated circuits is costly and space-intensive, as conventional methods require duplicating circuits, which can significantly reduce available space on the integrated circuit for other applications.
Innovation Solution
A method and circuit for providing temporal redundancy by implementing a comparison circuit that detects and compares output signals at different times, generating an error signal based on discrepancies, allowing for error detection without the need for multiple hardware implementations, using either serial or parallel registers and clock signals to achieve this comparison.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundant circuits are implemented in hardware, then reliability is improved, but area is worsened
Solution Approach 1:
The patent applies periodic action by executing the same hardware circuit multiple times at different time periods. The circuit processes the same input data through multiple computational passes, with each pass occurring at a different time point. This temporal repetition enables error detection and correction without requiring duplicate hardware circuits, thereby maintaining reliability while conserving integrated circuit area.
Solution Approach 2:
The patent implements a virtual copy mechanism where the same hardware circuit is logically replicated through temporal execution rather than physical duplication. By storing intermediate results in memory and re-executing the circuit with different input combinations, the system creates computational copies without occupying additional hardware space, thus resolving the contradiction between reliability and area.
2Ease of manufacture
If temporal redundancy is implemented in software, then hardware cost is reduced, but execution time is increased
Solution Approach 1:
The patent applies preliminary action by pre-computing and storing intermediate results in memory during the first execution pass. These pre-stored results are then reused in subsequent passes, eliminating the need to re-compute the same operations. This approach reduces the overall execution time compared to pure software temporal redundancy while maintaining hardware cost benefits.
Solution Approach 2:
The patent maintains continuity of useful action by overlapping computation and memory operations. While the circuit executes computational tasks, memory operations occur in parallel, and the system continuously processes data through multiple passes without idle periods. This continuous operation minimizes execution time while preserving the hardware cost advantages of temporal redundancy.
Data Source
AI summary
A method and circuit for providing temporal redundancy for a hardware circuit implemented in an integrated circuit is disclosed. The method comprises implementing a comparison circuit for comparing values in the integrated circuit; coupling an input signal to the hardware circuit; detecting an output signal of the hardware circuit at a first time, wherein the output signal is based upon the input signal; holding the input signal until at least a second time; detecting the output signal of the hardware circuit at the second time; determining, by the comparison circuit, whether the output signal of the hardware circuit at the first time corresponds to the output signal of the hardware circuit at the second time; and generating an error signal based upon determining whether the output signal of the hardware circuit at the first time corresponds to the output signal of the hardware circuit at the second time.