Temporary Interconnect for Fine-Pitch Semiconductor Package Testing

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Solution Overview

Problem

Current test sockets are inadequate for testing semiconductor packages with fine or ultra-fine pitches, leading to signal integrity issues, high costs, and imprecision, as well as the inability to detect manufacturing defects, which reduces yield and reliability.

Innovation Solution

A temporary interconnect is used to electrically couple contact pads and test pads via a conductive structure and adhesive, allowing for precise testing and subsequent removal to prevent signal interference, thereby overcoming the limitations of strip- and wafer-level testing techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If strip- or wafer-level probe technologies are used to test contact pads with fine or ultra-fine pitches, then testing capability is achieved, but signal integrity deteriorates due to long traces coupling fanned-out test pads to contact pads

Engineering Contradiction:
Improvetesting capabilityVSAvoidsignal integrity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent transitions from planar fanned-out test pads to a three-dimensional vertical interconnect structure. Test pads are formed on the same substrate as contact pads, and conductive vias provide direct vertical coupling, eliminating the need for long horizontal traces. This dimensional change reduces signal path length and improves signal integrity while maintaining testing capability for fine-pitch contact pads.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The invention extracts the test pad structure from the traditional fanned-out configuration and repositions it directly on the substrate near contact pads. By removing the intermediate fanning-out traces and using direct vertical vias, the harmful long trace coupling is eliminated while preserving the essential testing function.

Inventive Principle:
Principle #2Taking out (Extraction)

2Adaptability or versatility

If strip- or wafer-level testing techniques are used, then testing can be performed, but manufacturing precision deteriorates due to inability to detect defects in fine or ultra-fine pitch devices

Engineering Contradiction:
Improvetesting capabilityVSAvoiddefect detection precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The vertical via structure enables direct electrical connection between test pads and contact pads with fine or ultra-fine pitches, allowing precise measurement of devices at these pitch levels. The short vertical path provides accurate electrical contact for detecting manufacturing defects that strip- or wafer-level techniques cannot detect.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent replaces the mechanical probe contact method with an integrated conductive via structure that provides direct electrical coupling. This substitution enables more precise electrical testing of fine-pitch devices by eliminating the mechanical contact limitations of traditional probe techniques.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Ease of operation

If test pads are left coupled to devices after testing, then no additional removal process is needed, but harmful factors increase due to signal interference and electrical shorts affecting proper operation

Engineering Contradiction:
Improvetesting convenienceVSAvoidsignal interference
Core Design Contradiction:
Ease of operationVSObject-generated harmful factors

Solution Approach 1:

The conductive path is segmented into separate test and operational sections by the via structure. After testing, the via can be selectively removed or isolated, segmenting the electrical connection between test pads and contact pads. This allows the test structure to be disconnected from the operational circuit, eliminating signal interference while maintaining the integrity of the final product.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The temporary conductive via structure serves its testing function and then can be discarded (removed or isolated) after testing is complete. This temporary structure is discarded once its purpose is fulfilled, leaving no harmful elements in the final operational device.

Inventive Principle:
Principle #34Discarding and recovering

4Reliability

If test pads are removed after testing to avoid interference, then signal integrity is improved, but productivity decreases due to tedious and costly removal process

Engineering Contradiction:
Improvesignal integrityVSAvoidyield
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The conductive via structure is designed as a temporary, disposable element used only for testing purposes. It can be easily removed or isolated after testing without complex procedures, making the removal process cost-effective and high-yield. The via serves its short-lived testing function and is then discarded, leaving no harmful remnants in the operational device.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The temporary interconnect enables cost-effective and precise testing of semiconductor packages, detects manufacturing defects, and prevents unwanted interference, thereby increasing yield and reliability.

Implementation Method 1

The temporary interconnect acts as an electrical bridge that electrically couples the contact pad and test pad to each other

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS11658079B2Temporary interconnect for use in testing a semiconductor package
Publication Date: 2023.05.23 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US11658079B2 patent drawing
  • US11658079B2 patent drawing
  • US11658079B2 patent drawing

AI summary

Embodiments described herein are directed to a temporary interconnect for use in testing one or more devices (e.g., one or more dies, inductors, capacitors, etc.) formed in semiconductor package. In one scenario, a temporary interconnect acts an electrical bridge that electrically couples a contact pad on a surface of a substrate and the test pad. Coupling the contact pad and the test pad to each other enables the device(s) coupled the contact pad to be tested. Following testing, the temporary interconnect can be removed or severed so that an electrical break is formed in the conductive path between test pad and the contact pad.