Temporary Wafer Die Stacking With Trench Separation
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Solution Overview
Problem
Current methods for 3D integrated circuit integration face challenges in efficiently stacking and separating dies due to limitations in existing bonding and patterning processes, which affect the density and efficiency of transistor placement on chip surfaces.
Innovation Solution
A method involving a temporary wafer, such as a quartz or semiconductor wafer, is bonded to a device wafer, and patterning processes like laser etching or plasma etching are used to create trenches that separate dies, allowing for the mechanical separation of individual dies and their subsequent bonding to another device wafer, utilizing a temporary bonding layer that can be de-bonded using radiation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a temporary wafer is bonded to a device wafer and patterning processes are used to create trenches, then dies can be separated and stacked to increase transistor density, but the process complexity and manufacturing steps increase
Solution Approach 1:
A temporary wafer is introduced as an intermediary carrier that simplifies the handling and processing of multiple dies. The temporary wafer allows dies to be processed together as a single unit, enabling efficient trench formation and separation, and can be removed after stacking, thus reducing overall process complexity despite the additional bonding step.
Solution Approach 2:
The device wafer is divided into individual dies through trench formation that fully extends through the device wafer. This segmentation allows each die to be separately handled, stacked, and integrated, enabling increased transistor density through 3D stacking while maintaining manufacturability through systematic separation processes.
2Productivity
If trenches are formed to fully extend through the device wafer to separate dies, then individual dies can be extracted and stacked, but the structural integrity during processing is compromised
Solution Approach 1:
The temporary wafer serves as a supporting intermediary that maintains structural integrity during trench formation and die separation. By bonding the temporary wafer to the device wafer before processing, the combined structure can withstand the mechanical stresses of trench etching and subsequent handling, allowing efficient die extraction without compromising strength.
3Ease of manufacture
If a temporary bonding layer is used to bond the temporary wafer to the device wafer, then the temporary wafer can be easily removed after stacking, but the bonding process requires additional steps and materials
Solution Approach 1:
The temporary bonding layer utilizes controllable bonding parameters (such as temperature, pressure, or chemical properties) that allow for easy removal after serving its purpose. The bonding strength can be modified by changing processing conditions, enabling the temporary wafer to be firmly attached during processing and then easily separated after stacking, thus simplifying manufacturing despite additional bonding steps.
4Manufacturing precision
If multiple patterning processes are performed on the combined wafer, then precise trench formation is achieved, but the manufacturing time and cost increase
Solution Approach 1:
The temporary wafer acts as a stable intermediary substrate that enables precise patterning processes. Its uniform surface and mechanical stability provide an ideal platform for multiple patterning steps, allowing accurate trench formation that would be difficult to achieve on the device wafer alone, thus achieving high precision while managing manufacturing time through efficient processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient stacking and separation of dies, allowing for increased transistor density and improved chip fabrication by processing the device wafer as a single unit and facilitating direct bonding of individual dies to another wafer, enhancing the integration process.
Implementation Method 1
bonding a first side of a temporary wafer to a first side of the first device wafer
Implementation Method 2
The first patterning process includes a laser etching process
Implementation Method 3
The first patterning process includes a plasma etching process
Implementation Method 4
removing the individual temporary regions from the individual dies includes subjecting the temporary bonding layer to a radiation
Data Source
AI summary
A method includes receiving a first device wafer comprising a plurality of dies, bonding a first side of a temporary wafer to a first side of the first device wafer to form a combined wafer, and performing a first patterning process on the combined wafer to form first trenches in the combined wafer. The first trenches fully extend through the first device wafer and partially into the temporary wafer from the first side of the temporary wafer. The first trenches separate the plurality of dies from each other. The method further includes placing the combined wafer on a support and applying a force to the combined wafer to separate the temporary wafer into individual temporary regions. Each individual temporary region is bonded to a respective individual die. The method further includes attaching individual dies to a second device wafer and removing the individual temporary regions from the individual dies.


