Multi-Tenant Storage Write Paths for Priority-Aware Data Routing

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Solution Overview

Problem

Existing multi-tenant storage architectures fail to optimize write paths based on tenant workflow and priority, leading to suboptimal system performance.

Innovation Solution

Modify the write path in multi-tenant storage devices to account for tenant behavior and system priority by using different types of RAM (e.g., DRAM, SRAM, HMB) to manage data routing based on tenant requirements, allowing dynamic or static priority adjustments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single write path is used for all tenants, then device complexity is reduced, but system performance is suboptimal due to inability to account for different tenant priorities and workloads

Engineering Contradiction:
Improvesystem performanceVSAvoidwrite path configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the write path into multiple distinct paths (first write path and second write path) that can be selectively activated based on tenant priority and workload characteristics. This allows the system to optimize performance for different tenant types without requiring a single complex configurable path, as each path can be simplified for its specific use case.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically selects between different write paths based on real-time tenant priority levels and workload characteristics. The controller adjusts which write path is active depending on whether the workload is read-intensive or write-intensive and the priority level of the tenant, enabling the system to adapt to changing conditions without manual reconfiguration.

Inventive Principle:
Principle #15Dynamics

2Productivity

If write path is optimized for specific tenant workloads, then productivity increases, but device complexity increases due to multiple write paths

Engineering Contradiction:
Improvewrite performanceVSAvoidmultiple write paths
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The controller is designed to universally manage multiple write paths and can direct traffic to the appropriate path based on tenant priority and workload type. This multi-functional controller consolidates the complexity of managing multiple paths into a single intelligent component that can handle various tenant requirements through software logic rather than hardware duplication.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If different RAM types are used for different tenants, then system performance is optimized for specific workloads, but device complexity and cost increase

Engineering Contradiction:
Improveworkload performanceVSAvoidmemory configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies local quality by assigning different RAM types (e.g., DRAM for write-intensive workloads, SRAM for read-intensive workloads) to specific write paths based on the requirements of particular tenants. This allows each tenant to receive memory resources optimized for their specific workload characteristics without requiring all tenants to use the same memory configuration, thereby optimizing performance locally for each tenant class.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12417027B2Optimizing usage of multiple write paths on multi-tenant storage devices
Publication Date: 2025.09.16 SANDISK TECHNOLOGIES LLC
  • US12417027B2 patent drawing
  • US12417027B2 patent drawing
  • US12417027B2 patent drawing

AI summary

Instead of ignoring workflow or priority of tenant, modify the write path according to the tenant behavior and system priority using the multi-tenant storage device. When writing information, the write path usually includes RAM memory where the host or device copies the data. The data is copied to the NVM storage element. The RAM memory may be either part of the storage controller (either SRAM or DRAM) or part of the host (like DRAM in HMB) that may be controlled by the storage controller. The RAM memories are used for different goals by the storage controller and optimizing the overall system performance (write/read) is a priority of the storage device. In multi-tenant architectures, the different tenants may have different priorities to have their requirements fulfilled. The tenant priority is passed by the host to the storage device through an interface and either be static or change dynamically during the device operation. Optimizing the write paths according to tenant workload and priority may be done by a module in the storage controller.