Tensor Memory Access for Massive MIMO Systems

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Solution Overview

Problem

The increasing number of antennas in massive and ultra-massive MIMO systems leads to higher data throughput, but also results in increased power consumption and data movement bottlenecks, particularly due to the complex matrix-based computations and inefficient memory access patterns.

Innovation Solution

The implementation of a memory access system that utilizes tensor access commands to optimize memory access patterns, allowing for simultaneous read and write operations across multiple memory locations in specific patterns such as row-wise, column-wise, diagonal, and sub-matrix access modes, thereby reducing power consumption and improving data throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of antennas in MIMO systems is increased to achieve higher data throughput, then data throughput is improved, but power consumption increases

Engineering Contradiction:
Improvedata throughputVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent segments the large matrix operations into smaller sub-matrices and divides memory access into specific patterns (row-wise, column-wise, diagonal, sub-matrix modes). This segmentation allows parallel processing of multiple sub-matrices simultaneously, improving throughput while reducing the computational complexity and power consumption per processing unit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces tensor access commands that operate on 3D tensor structures instead of traditional 2D matrices, adding a temporal dimension to the data organization. This dimensional change enables more efficient memory access patterns and better utilization of parallel processing units, achieving higher throughput with reduced power consumption.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If the number of antennas in MIMO systems is increased to achieve higher data throughput, then data throughput is improved, but data movement bottlenecks worsen

Engineering Contradiction:
Improvedata throughputVSAvoiddata movement bottleneck
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements preliminary action by pre-organizing data into tensor structures and pre-calculating access patterns before actual processing. The memory controller prepares sub-matrix data in advance and organizes it according to the specific access mode required, eliminating data movement bottlenecks during the actual processing phase.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent ensures continuity of useful action by implementing overlapping memory access and computation operations. While one processing unit is computing, the memory controller is simultaneously preparing the next set of sub-matrices, and other processing units are finishing their current operations. This continuous pipeline eliminates idle time and data movement bottlenecks.

Inventive Principle:
Principle #20Continuity of useful action

3Productivity

If complex matrix-based computations are performed to achieve better beamforming and spatial multiplexing performance, then spectrum efficiency is improved, but power consumption increases

Engineering Contradiction:
Improvespectrum efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamics by making the memory access pattern adaptive based on the specific operation being performed. The system dynamically selects between row-wise, column-wise, diagonal, or sub-matrix access modes depending on the computational requirements of the current beamforming or spatial multiplexing operation, optimizing power efficiency for each specific task.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of memory access organization from traditional row-major or column-major ordering to tensor-based multi-dimensional organization. This parameter change in data structure allows for more efficient computation patterns that reduce the number of memory accesses required for complex matrix operations, thereby reducing power consumption while maintaining spectrum efficiency.

Inventive Principle:
Principle #35Parameter changes

4Ease of operation

If traditional memory access patterns are used in massive MIMO systems, then implementation simplicity is maintained, but data processing efficiency decreases

Engineering Contradiction:
Improveimplementation simplicityVSAvoiddata processing efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent implements universality by creating a unified tensor access command interface that handles multiple access patterns (row-wise, column-wise, diagonal, sub-matrix) through a single standardized command structure. This universal interface maintains implementation simplicity while enabling efficient data processing through the underlying optimized access patterns.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12340117B2Tensor memory access based implementation for massive and ultra-massive MIMO systems
Publication Date: 2025.06.24 MICRON TECHNOLOGY INC
  • US12340117B2 patent drawing
  • US12340117B2 patent drawing
  • US12340117B2 patent drawing

AI summary

Examples described herein include systems and methods which include a multiple input, multiple output transceiver including a plurality of receive antenna configured to receive a plurality of receive signals, and a wireless receiver coupled to the plurality of antenna and configured to receive and decode the plurality of receive signals. The transceiver includes a memory array and a memory controller. The memory controller includes a data address generator configured to, during the decode of the plurality of receive signals, generate at least one memory address according to an access mode of a memory command associated with a memory access operation. The at least one memory address corresponds to a specific sequence of memory access instructions to access a memory cell of the memory array.