Tensor-Product Parity Coding for Higher Gain Without Code-Rate Loss
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Solution Overview
Problem
Linear block codes with shorter input block lengths, used in data recording and communication, require higher overhead, resulting in a performance tradeoff between coding gain and code rate, limiting the effectiveness of error correction in data communication systems.
Innovation Solution
The implementation of Tensor-Product Codes (TPC) with a receive module, parity generation, and error recovery modules that generate and combine parity bits with data streams to produce encoded bits, and a decoder that generates log-likelihood ratios and syndrome data to correct errors, while replacing parity bits with zeros in the corrected data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If linear block codes with shorter input block lengths are used, then coding gain is improved, but code rate penalty increases
Solution Approach 1:
The code is segmented into multiple parity bits (first parity bit, second parity bit, third parity bit) generated from different subsets of data bits. This segmentation allows the code to achieve the reliability benefits of shorter block lengths while maintaining a higher overall code rate by distributing parity requirements across multiple independent checks.
2Reliability
If higher overhead is used to achieve shorter input block lengths, then error detection and correction capability is improved, but code rate is reduced
Solution Approach 1:
Different portions of the data stream are assigned different local parity check characteristics. The first parity bit checks a first subset of data bits, the second parity bit checks a second subset, and the third parity bit checks a third subset. This local quality approach allows error correction capability to be enhanced in specific local regions without requiring uniform high overhead across the entire code, thereby maintaining a higher overall code rate.
Data Source
AI summary
Encoder and decoder apparatus and methods derive a plurality of parity bits from a single codeword. Encoder apparatus may include a receive module receiving a data stream, a parity generation module generating a plurality of parity bits based on the data stream and a word of a tensor-product code, and a parity insertion module combining the plurality of parity bits and the data stream to generate encoded bits. Decoder apparatus may include a detector receiving and outputting encoded data, a first decoder generating first log-likelihood ratios (LLRs) from the encoded data, an error recovery module generating second LLRs from the encoded data, a second decoder that derives syndrome data from the first and second LLRs, a post-processor that combines data from the first decoder with error events from the error recovery module to generate corrected data, the post-processor further identifying a plurality of parity bits in the corrected data.


