Termination Ballast in Trench Field Plate MOSFETs for Hotspot Suppression
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Solution Overview
Problem
Trench field plate power MOSFETs face challenges in achieving good breakdown voltage performance while handling avalanche hotspot currents, particularly due to the sensitivity of breakdown voltage to design parameters and the difficulty in redesigning the termination region to suppress hotspot formation.
Innovation Solution
The integration of termination ballast resistance between vulnerable regions and a nearby source contact of the transistor device, achieved by forming narrow body implant regions with specified minimum sheet resistance and preventing the formation of conductive regions on top of these implants, helps in delaying the onset of double injection and negative differential resistance branches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the termination region is designed to suppress hotspot formation, then reliability improves, but device complexity and redesign cost increase
Solution Approach 1:
The patent modifies the termination region design by adjusting geometric parameters (trench depth, field plate width, dielectric thickness) and doping parameters to suppress hotspot formation. By changing these parameters, the patent achieves improved reliability without requiring fundamental redesign of the device architecture.
Solution Approach 2:
The patent applies different design characteristics to specific regions of the device. The termination region is designed with distinct features (such as extended field plates, modified trench structures, or localized doping profiles) compared to the active region, allowing hotspot suppression in the termination area without affecting the performance of the active MOSFET regions.
2Strength
If breakdown voltage is increased through parameter optimization, then voltage performance improves, but sensitivity to parameter variations increases
Solution Approach 1:
The patent incorporates design features that provide a margin of safety against parameter variations. By designing the termination region with robust features (such as extended field plates or increased dielectric thickness), the patent creates a cushion that prevents breakdown voltage degradation even when manufacturing tolerances cause parameter deviations.
Solution Approach 2:
The patent employs iterative design and simulation processes to optimize the termination region parameters. Through feedback from breakdown voltage simulations and hotspot analysis, the design parameters are adjusted to achieve a balance between high breakdown voltage and reduced parameter sensitivity, ensuring robust performance across manufacturing variations.
3Reliability
If termination region area is increased to share avalanche current, then UIS capability improves, but device area and cost increase
Solution Approach 1:
The patent utilizes thin field plate dielectric layers and slender field plate structures to extend the termination region's current-sharing capability without proportionally increasing the device area. By using thin-film dielectrics and optimized field plate geometries, the patent achieves enhanced UIS capability with minimal area penalty.
Solution Approach 2:
The patent extends the termination region's functionality into the vertical dimension through deep trenches and multi-layer field plate structures. By utilizing the third dimension (depth) rather than only increasing surface area, the patent achieves improved avalanche current sharing capability without proportionally increasing the device footprint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively mitigates avalanche hotspot formation, improves voltage breakdown characteristics, and enhances the unclamped inductive switching capability of trench field plate power MOSFETs without adding process complexity.
Implementation Method 1
The integration of termination ballast resistance between vulnerable regions and a nearby source contact of the transistor device, achieved by forming narrow body implant regions with specified minimum sheet resistance
Implementation Method 2
unclamped inductive switching (UIS) experiments reveal that the avalanche current during the off-state is shared between the active and termination regions
Implementation Method 3
termination hotspot induced failures may occur at low overall currents
Data Source
AI summary
A high voltage trench field plate power MOSFET device is fabricated in a substrate having first and second trenches separated from one another by a narrow epitaxial semiconductor drift pillar structure, where insulated gate electrode layers and insulated field plate layers are formed in the first and second trenches, and where a body well region is formed in an upper portion of the narrow epitaxial semiconductor drift pillar structure to include source contact regions in an active area, and to include an integrated ballast resistor section which connects one or more of the source contact regions to the termination area and which has no source contact regions.