Termination Calibration Circuit for NBTI-Induced Impedance Drift
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Solution Overview
Problem
Semiconductor devices face signal distortion and impedance mismatch issues due to transistor degradation from stress like NBTI, leading to degraded signal integrity and potential setup/hold failures, especially during high-speed data transmission.
Innovation Solution
A semiconductor device with a calibration circuit that replicates stress applied to transistors to generate a detection code, allowing for adjustment of termination control codes to match impedance, thereby compensating for transistor deterioration and improving impedance matching characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If transistors are used in termination circuits for high-speed data transmission, then signal transmission speed is improved, but transistor degradation from stress like NBTI causes impedance mismatch and signal distortion
Solution Approach 1:
The patent applies preliminary action by performing calibration operations before normal data transmission to generate compensation values that account for transistor characteristics. The calibration circuit pre-adjusts termination resistance values based on measured impedance deviations, storing these compensation values for use during subsequent high-speed operations. This ensures that even as transistors degrade from NBTI stress, the previously calibrated compensation values maintain acceptable impedance matching.
Solution Approach 2:
The patent implements feedback through calibration circuits that continuously monitor impedance matching characteristics and adjust termination resistance accordingly. The system measures actual impedance deviations caused by transistor degradation and feeds this information back to modify control codes for termination transistors, creating a closed-loop system that maintains impedance matching despite ongoing transistor stress and degradation.
2Reliability
If calibration circuits are added to compensate for transistor degradation, then impedance matching is improved, but device complexity increases
Solution Approach 1:
The patent merges the calibration circuit functionality with the existing termination circuit structure, using the same physical transistors and resistors for both calibration and normal operation. The calibration circuit shares components with the termination circuit, combining measurement and adjustment functions into a unified structure rather than adding completely separate calibration hardware, thereby reducing overall device complexity.
Solution Approach 2:
The patent applies universality by designing calibration circuits that can serve multiple purposes: measuring impedance characteristics, generating compensation values, and adjusting termination resistance. The same calibration circuitry is used for both initial calibration and ongoing compensation during operation, making the circuit multi-functional and reducing the need for dedicated separate components for each function.
Data Source
AI summary
A semiconductor device which includes a termination circuit coupled to a first pad and suitable for providing a termination resistance according to a first control code and a second control code during a normal operation in which data are input and output through the first pad; a stress replica circuit suitable for replicating a stress applied to the termination circuit during the normal operation and for generating a detection code during a second calibration mode; a first calibration circuit suitable for adjusting the first control code to match an impedance of a resistor part coupled to a second pad to an external resistor during a first calibration mode; and a second calibration circuit suitable for generating the second control code by adjusting the first control code according to the detection code during the second calibration mode.