Programmable Termination Capacitance for Bandwidth Extension
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Solution Overview
Problem
Variations in termination resistance due to manufacturing processes and operating conditions lead to parasitic capacitance variations in programmable termination resistance circuits, causing signal integrity degradation through undesirable ringing and increased settling time in high-speed IOs.
Innovation Solution
A programmable termination capacitance circuit is introduced, with compensation banks and pass gates to maintain constant parasitic capacitance by compensating for changes caused by programming the programmable termination resistance circuit, coupled with an inductor in an inductive peaking network to extend bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a programmable termination resistance circuit is used to counter variations in termination resistance, then termination accuracy is improved, but parasitic capacitance variations increase causing signal integrity degradation
Solution Approach 1:
The patent changes the electrical parameters of the termination circuit by introducing programmable capacitance elements that can be adjusted to compensate for parasitic capacitance variations. By dynamically changing the capacitance parameter in response to detected signal integrity issues, the system maintains optimal termination performance across different operating conditions while preserving signal quality.
Solution Approach 2:
The patent implements a feedback mechanism where the system detects variations in parasitic capacitance caused by programmable termination resistance changes, and automatically adjusts compensation capacitance values to maintain constant total capacitance. This closed-loop feedback ensures that signal integrity is preserved while allowing flexible termination resistance programming.
2Measurement precision
If different banks of poly resistors are selected for custom programming, then termination resistance accuracy is improved, but parasitic capacitance variations increase
Solution Approach 1:
The patent segments the termination circuit into multiple independent programmable banks, where each bank contains both resistance and capacitance elements. This segmentation allows independent programming of resistance values in each bank while providing corresponding capacitance compensation options, reducing the overall complexity by organizing the programmable elements in modular units.
Solution Approach 2:
The patent creates a universal programmable termination structure where each bank can be independently configured for different resistance values while providing automatic capacitance compensation. This multi-functional design allows the same circuit architecture to handle various termination requirements without increasing complexity, as the compensation mechanism works uniformly across all programming configurations.
3Speed
If an inductor is added in series with termination resistance for bandwidth extension, then frequency response is improved, but parasitic capacitance effects are amplified causing ringing
Solution Approach 1:
The patent changes the capacitance parameter by introducing programmable compensation capacitance that can be adjusted to optimize the LC circuit formed by the inductor and termination capacitance. By dynamically changing the capacitance value, the system extends bandwidth while controlling the resonant frequency and damping characteristics to minimize ringing effects.
Solution Approach 2:
The patent converts the harmful parasitic capacitance into a beneficial element by providing programmable compensation that allows the capacitance to be tuned for optimal performance. The inductor-capacitor combination, which initially causes ringing, is transformed into a bandwidth-extending peaking network by proper capacitance compensation, turning the harmful resonant effect into a useful frequency response enhancement.
Data Source
AI summary
An integrated circuit device includes an input/output (IO) pad, and a programmable termination capacitance circuit coupled to the IO pad, the programmable termination capacitance circuit comprising at least one compensation bank, wherein each of the at least one compensation bank includes a compensation capacitor coupled to a reference voltage through a compensation pass gate.


