Termination Circuit Enable Signal Generation for Memory Bus Interference
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Solution Overview
Problem
In high-speed memory operations, reflected wave interference from non-operating memory devices disrupts access operations in shared bus architectures, necessitating a novel circuit design to reduce interference without increasing control signals or manufacturing costs.
Innovation Solution
A semiconductor device design featuring a controller circuit and a signal generating circuit that generates termination circuit enable signals based on chip enable signals, allowing each memory device to selectively enable its internal termination circuit, thereby reducing reflected wave interference and maintaining low manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If termination resistors are turned on at both memory controller side and memory device side to reduce reflected wave interference, then signal interference is reduced, but device complexity and control signal requirements increase
Solution Approach 1:
The patent extracts the termination control function from the controller circuit by introducing a separate signal generating circuit. This circuit generates termination circuit enable signals based on chip enable signals, allowing termination resistors to be activated independently without increasing controller complexity or output port requirements.
Solution Approach 2:
The patent introduces an intermediary signal generating circuit that acts as a mediator between the controller circuit and memory devices. This circuit receives chip enable signals and generates termination circuit enable signals, effectively decoupling the termination control from the main controller and reducing the controller's burden.
2Productivity
If multiple memory devices are connected through a shared bus to improve access efficiency, then access efficiency is improved, but reflected wave interference from non-operating devices increases
Solution Approach 1:
The patent applies local quality by enabling termination circuits selectively in memory devices based on their operational status. When a memory device is not selected for operation, its termination circuit is activated to reduce reflected waves locally at that device, while other operating devices maintain normal signal reception without unnecessary termination.
Solution Approach 2:
The patent implements dynamic control of termination circuits by linking their activation state to the chip enable signals. The termination circuits are dynamically enabled or disabled based on whether the memory device is currently being accessed, allowing the system to adapt to changing operational conditions and minimize interference.
3Object-affected harmful factors
If termination circuits are controlled individually for each memory device to reduce interference, then interference reduction is improved, but manufacturing cost increases
Solution Approach 1:
The patent achieves universality by using a single signal generating circuit that serves multiple memory devices simultaneously. The circuit generates termination circuit enable signals for all connected memory devices based on their respective chip enable signals, providing individualized termination control without requiring separate control circuits for each device, thus avoiding increased manufacturing costs.
Data Source
AI summary
A semiconductor device includes a controller circuit and a signal generating circuit. The controller circuit is coupled to a plurality of memory devices and configured to generate a plurality of chip enable signals. One of the chip enable signals is provided to one of the memory devices, so as to respectively enable the corresponding memory device. The signal generating circuit is disposed outside of the controller circuit and configured to receive the chip enable signals and generate a termination circuit enable signal according to the chip enable signals. The termination circuit enable signal is provided to the memory devices. When a state of any of the chip enable signals is set to an enabled state, a state of the termination circuit enable signal generated by the signal generating circuit is set to an enabled state.