Termination Resistance Circuit With ESD Diodes for Low-Capacitance Links

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Solution Overview

Problem

Existing communications circuits face performance degradation due to parasitic capacitance from ESD protection diodes, especially at high operating frequencies, which can lead to reduced data rates and bandwidth.

Innovation Solution

The implementation of a termination circuit with multiple termination blocks, each including a resistive circuit, a selection switch, and a string of diodes that are nonconductive during normal operation but conductive during ESD events to discharge ESD current to a supply voltage terminal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ESD protection diodes are added to protect circuit components, then reliability is improved, but parasitic capacitance increases causing performance degradation at high frequencies

Engineering Contradiction:
ImproveESD protectionVSAvoidcommunication circuit performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the ESD protection function from the signal path by placing diodes in parallel with the signal line rather than in series. This allows the ESD protection to operate independently without adding parasitic capacitance to the signal path, thus protecting the circuit while maintaining high-frequency performance.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a parallel diode configuration as an intermediary protection mechanism. The diodes are positioned to clamp ESD voltage spikes without being in the direct signal path, acting as a mediator that protects against ESD events while leaving the signal transmission path unchanged and free from additional capacitance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If ESD circuitry is placed on signal lines for protection, then reliability is improved, but capacitance on signal lines increases reducing data rates

Engineering Contradiction:
Improvecircuit protectionVSAvoidsignal line capacitance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The ESD protection function is extracted from the signal line by placing diodes in parallel configuration. This removes the capacitance burden from the signal path while maintaining protection functionality, as the diodes only conduct during ESD events and remain high-impedance during normal operation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies ESD protection locally at specific vulnerable points in the circuit rather than along the entire signal line. The diodes are strategically placed to protect critical components without adding capacitance to the entire signal path, providing targeted protection with minimal impact on signal integrity.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces ESD circuitry on signal lines, minimizing capacitance and improving communication circuit performance, especially at high frequencies, by effectively discharging ESD current and protecting circuit components.

Implementation Method 1

An ESD event may occur when a charged object (e.g., a human finger) inadvertently contacts a conductive surface of an integrated circuit die (e.g., a contact pad or other die terminal) or a conductive surface of an integrated circuit package coupled to the pad where charge at an elevated voltage is applied to the conductive surface due to the contact

Methodology Applied
Scientific EffectElectrostatic Discharge: Electrostatic Discharge

Implementation Method 2

Each block includes a string of one or more diodes coupled to the resistive circuit and to the selection switch. The string of diodes is nonconductive during normal operation and is conductive during an ESD event affecting the die terminal

Methodology Applied
Scientific EffectDiode blocking effect: Diode

Data Source

PatentEP4568450A1Communication circuit having a termination resistance circuit with ESD circuitry
Publication Date: 2025.06.11 NXP BV
  • EP4568450A1 patent drawingFigure 1
  • EP4568450A1 patent drawingFigure 2
  • EP4568450A1 patent drawingFigure 3

AI summary

A communication circuit includes a termination circuit with multiple termination blocks where the termination circuit is coupled to a die terminal for conveying a signal. Each termination block includes a resistive circuit and a switch for selectively implementing the resistance of the resistive circuit in the termination resistance of the communication circuit. Each block includes a string of one or more diodes coupled to the resistive circuit and to the selection switch. The string of one or more diodes is nonconductive during normal operation and is conductive during an ESD event affecting the die terminal to discharge the ESD current to a supply voltage terminal when the selection switch is nonconductive.