On-Chip Termination Resistor Calibration With Comparator Offset Cancellation

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Solution Overview

Problem

Conventional on-chip termination resistor calibration systems suffer from input offset errors in comparators, leading to inaccurate resistance calibration due to device random mismatch, which affects signal integrity and operational speed.

Innovation Solution

A resistor calibration system that shares a comparator for calibrating both pull-up and pull-down resistors using a multiplexer and de-multiplexer to cancel out the input offset error, ensuring accurate resistance calibration by maintaining the same offset error magnitude across both phases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a comparator is used to calibrate the on-chip termination resistor by comparing voltages, then the calibration function is achieved, but input offset error causes calibration inaccuracy

Engineering Contradiction:
Improvecalibration accuracyVSAvoidcalibration reliability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent creates a duplicate comparator circuit that mirrors the original comparator's offset error characteristics. By copying the offset error and subtracting it from the measurement, the system eliminates the harmful offset effect while preserving the calibration functionality.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent introduces an offset error measurement circuit as an intermediary that captures and quantifies the comparator's offset error. This intermediary measurement is then used to compensate for the offset in the actual calibration process, separating the offset error from the calibration measurement.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If an external reference resistor is used for calibration, then accurate reference value is obtained, but additional external components and connections are required

Engineering Contradiction:
Improvereference resistance accuracyVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the reference resistance function from an external component and implements it using internal on-chip resistors. By taking out the external reference resistor requirement and replacing it with internal resistance elements, the system achieves accurate calibration without external components.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent makes the on-chip resistors serve multiple functions: they act as both the termination resistors to be calibrated and the reference resistors for calibration. This multi-functionality eliminates the need for separate external reference components while maintaining calibration accuracy.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach eliminates the impact of comparator input offset errors, resulting in precise on-chip termination resistor calibration and improved signal integrity and operational speed.

Implementation Method 1

The voltage obtained by the voltage division may further be compared with a reference voltage via a comparator

Methodology Applied
Scientific EffectVoltage division: Ohm's Law

Implementation Method 2

the comparator may usually possess an offset error between its two input terminals

Methodology Applied
Scientific EffectComparator offset error:

Data Source

PatentUS9825613B1Resistor calibration system
Publication Date: 2017.11.21 NOVATEK MICROELECTRONICS CORP
  • US9825613B1 patent drawing
  • US9825613B1 patent drawing
  • US9825613B1 patent drawing

AI summary

A resistor calibration system includes a reference resistor, a first control circuit, a second control circuit, a comparator, a multiplexer and a de-multiplexer. The first control circuit calibrates a first resistor and a duplicated first resistor. The second control circuit calibrates a second resistor. The comparator includes a first input terminal receiving a reference voltage, a second input terminal and an output terminal. The multiplexer includes a first input terminal coupled to the reference resistor and the first resistor, a second input terminal coupled to the duplicated first resistor and the second resistor, and an output terminal coupled to the second input terminal of the comparator. The de-multiplexer includes an input terminal coupled to the output terminal of the comparator, a first output terminal coupled to the first control circuit, and a second output terminal coupled to the second control circuit.