Termination Structure for Insulated Gate Semiconductor Device

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Solution Overview

Problem

Current insulated trench gated Schottky devices face challenges in achieving optimal breakdown voltage and avoiding photolithographic alignment issues as device geometries shrink, while also requiring cost-effective and easily integratable termination structures that maintain or improve electrical performance.

Innovation Solution

The implementation of a termination structure with a conductive structure electrically isolated by a dielectric layer, featuring a field plate configuration and optionally paired conductive spacers, which can be electrically connected or floating, to manage electrical field build-up and provide design flexibility and scalability for various voltage levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a single wide termination trench with polysilicon spacers is used, then ease of manufacture is improved, but manufacturing precision deteriorates due to photolithographic alignment issues

Engineering Contradiction:
Improveease of manufactureVSAvoidmanufacturing precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

A dielectric layer is introduced as an intermediary between the conductive structure and the semiconductor region. This dielectric layer serves as a mediator that eliminates the need for direct alignment between conductive spacers and semiconductor features, thereby resolving the photolithographic alignment issues while maintaining ease of manufacture

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The termination structure is segmented into distinct functional components: a dielectric layer for electrical isolation, conductive structures (spacers or fill) for field management, and a structured separation between the termination region and active region. This segmentation allows each component to be optimized independently, improving manufacturing precision without compromising ease of manufacture

Inventive Principle:
Principle #1Segmentation

2Productivity

If device geometries are shrunk, then productivity is improved, but manufacturing precision deteriorates due to alignment issues

Engineering Contradiction:
ImproveproductivityVSAvoidmanufacturing precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The dielectric layer acts as a buffer that decouples the scaling of device geometries from the alignment requirements. As device geometries shrink to improve productivity, the dielectric layer maintains proper spacing and electrical isolation without requiring proportionally tighter alignment tolerances, thereby preserving manufacturing precision

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If a wide termination trench is used, then ease of manufacture is improved, but device complexity increases

Engineering Contradiction:
Improveease of manufactureVSAvoiddevice complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The dielectric layer is strategically placed only in the termination region where electrical isolation is needed, rather than throughout the entire device. This localized approach provides the necessary electrical isolation and field management while minimizing the overall device complexity and maintaining ease of manufacture

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances the electrical performance of semiconductor devices by effectively managing electrical field build-up, maintaining performance across different voltage levels, and integrating seamlessly with existing processes, thereby improving manufacturing efficiency and device reliability.

Implementation Method 1

a conductive structure within the termination trench and electrically isolated from the region of semiconductor material by a dielectric structure

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

A Schottky contact region is disposed adjacent the first major surface on opposing sides of the first active trench

Methodology Applied
Scientific EffectSchottky barrier:

Data Source

PatentUS10847659B2Termination structure for insulated gate semiconductor device and method
Publication Date: 2020.11.24 SEMICON COMPONENTS IND LLC
  • US10847659B2 patent drawing
  • US10847659B2 patent drawing
  • US10847659B2 patent drawing

AI summary

A semiconductor device structure includes a region of semiconductor material having an active region and a termination region. An active structure is disposed in the active region and a termination structure is disposed in the termination region. In one embodiment, the termination structure includes a termination trench and a conductive structure within the termination trench and electrically isolated from the region of semiconductor material by a dielectric structure. A dielectric layer is disposed to overlap the termination trench to provide the termination structure as a floating structure. A Schottky contact region is disposed within the active region. A conductive layer is electrically connected to the Schottky contact region and the first conductive layer extends onto a surface of the dielectric layer and laterally overlaps at least a portion of the termination trench.