Ternary Inverter Layout with Gate-Independent Constant Current Paths

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Solution Overview

Problem

Conventional binary logic-based digital systems face limitations in bit density due to increased leakage current and power consumption, and ternary logic inverters require multiple voltage sources or complex circuit configurations.

Innovation Solution

A transistor device with a constant current generating layer between the source and drain regions, independent of gate voltage, and a ternary inverter device comprising NMOS and PMOS transistors with constant current paths, allowing for three stable output states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional binary logic-based digital systems increase bit density through miniaturization, then processing speed improves, but leakage current and power consumption increase due to quantum tunneling effect

Engineering Contradiction:
Improveprocessing speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent transitions from binary logic (2 states) to ternary logic (3 states), fundamentally changing the operational parameters of the logic system. This allows for more efficient data processing with fewer transistors, reducing overall power consumption while maintaining or improving processing speed. The constant current path mechanism further optimizes energy usage by eliminating unnecessary current flow in non-conducting states.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If conventional STI techniques are used to implement ternary logic, then bit density increases, but circuit configuration becomes complicated and additional voltage sources are required

Engineering Contradiction:
Improvebit densityVSAvoidcircuit configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent employs a universal constant current path mechanism that functions across all three logic states (0, 1, 2) without requiring separate circuit configurations or additional voltage sources. The same basic transistor structure with constant current path can implement all ternary logic operations, simplifying the overall circuit design while maintaining high bit density.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the current path functionality into a single integrated structure where the constant current path serves multiple purposes: it provides biasing, defines logic states, and enables logic operations simultaneously. This eliminates the need for separate voltage sources and complex circuit configurations required by conventional STI techniques.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The transistor device achieves a constant current independent of gate voltage, and the ternary inverter provides three stable output states without requiring additional voltage sources, enhancing data processing efficiency.

Implementation Method 1

there was a limitation in increasing the bit density due to the increase in leakage current and power consumption due to the quantum tunneling effect

Methodology Applied
Scientific EffectQuantum tunneling effect:

Data Source

PatentUS12484263B2Transistor device, ternary inverter device including same, and manufacturing method therefor
Publication Date: 2025.11.25 TERNELL CO LTD
  • US12484263B2 patent drawing
  • US12484263B2 patent drawing
  • US12484263B2 patent drawing

AI summary

A transistor device includes a substrate, a source region provided on the substrate, a drain region in the substrate, spaced apart from the source region in a direction parallel to a top surface of the substrate, a gate electrode provided on the substrate and between the source region and the drain region, a gate insulating film interposed between the gate electrode and the substrate, and a constant current generating layer extending between the source region and the drain region, in the direction parallel to the top surface of the substrate, wherein the constant current generating layer generates a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.