Ternary Logic Data Interface Self-Clocking Multi-Mode Operation
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Solution Overview
Problem
Existing digital data communication technologies are limited by binary logic representations, which restrict data rate and efficiency in data transmission over existing media connections.
Innovation Solution
The implementation of ternary logic interfaces that utilize additional logic states for self-clocking and multi-mode operation, enabling higher data rates by mapping more data onto existing transmission media.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If binary logic representation is used for data transmission, then the interface design is simple and compatible with existing systems, but the data rate and transmission efficiency are limited
Solution Approach 1:
The patent changes the fundamental parameter of logic representation from binary (base 2) to ternary (base 3). This parameter change allows three logic states (0, 1, 2) to be transmitted instead of just two, enabling more data to be encoded in each signal transition. The ternary encoder maps binary input data to ternary output sequences, and the decoder reconstructs the original data from the ternary signal, achieving higher data rates without proportionally increasing physical interface complexity
Solution Approach 2:
The patent adds an additional dimension to the data transmission by introducing a third logic state. Instead of transmitting data along a single binary dimension (0 or 1), the ternary system adds a third dimension (state 2), allowing more information to be conveyed per transmission event. This dimensional expansion enables the interface to transmit multi-bit data codes over media normally supporting single-bit codes
2Productivity
If ternary logic states are used for self-clocking and multi-mode operation, then interface efficiency and data rate increase, but the complexity of the transmission interface increases
Solution Approach 1:
The patent implements multi-functionality by using the ternary logic states for multiple purposes simultaneously. The additional logic states serve dual functions: they carry data information and provide self-clocking capability for synchronization. The ternary encoder and decoder are designed to handle both data transmission and clock recovery within the same interface, eliminating the need for separate clock lines and improving overall interface efficiency
Solution Approach 2:
The ternary signaling system provides self-service through self-clocking capability. The variable-length ternary sequences inherently contain timing information that allows the receiver to automatically synchronize without external clock signals. The idle state in ternary representation serves as a natural clock reference, enabling the interface to self-regulate and maintain synchronization during data transmission
3Productivity
If existing transmission media are used with binary logic, then compatibility is maintained, but the maximum data rate is constrained
Solution Approach 1:
The patent changes the encoding parameter from binary to ternary while maintaining compatibility with existing transmission media. The ternary encoder transforms binary data into variable-length ternary sequences that can be transmitted over standard media. The decoder at the receiving end converts the ternary sequences back to binary data, achieving higher effective data rates on the same physical infrastructure without requiring new media technology
Solution Approach 2:
The patent employs dynamic variable-length coding in the ternary system. Instead of fixed-length codes, the ternary encoder generates sequences of varying lengths based on the input data patterns. This dynamic approach optimizes the use of transmission media capacity, allowing more data to be transmitted in the same time frame while maintaining reliable transmission through the inherent error-detection capabilities of the ternary decoding process
Data Source
AI summary
A unique ternary logic based digital data communication interface between devices is described. The invention makes use of the additional logic states available within a ternary representation to implement a communication interface with self clocking and integrated multi-mode operation. Another improvement the invention provides is an increased data rate possible over existing transmission media connections. The invention concept has applications to both serial and parallel communication interface types. A single ended serial interface configuration is described using ternary signaling to encode data plus an inserted clock phase to support self clocking operation. A differential serial interface configuration is described using ternary signaling to encode multi-bit data plus both a clock phase and an idle mode state. Finally, a ternary encoded parallel bus interface configuration is described as an improvement over binary encoding allowing: self clocking, idle mode and a reduction in the number of transmission media elements.