Stacked 2DEG Ternary Logic Device via Binary Oxide Heterojunctions
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Solution Overview
Problem
Current semiconductor devices are limited to binary logic, struggling to achieve multi-valued logic states due to circuit complexity and material constraints, hindering their application in advanced information processing demands.
Innovation Solution
A semiconductor device utilizing two-dimensional electron gas channels at a non-single-crystal binary oxide heterojunction interface, with controlled thickness of oxide thin films to induce multiple resistance states, enabling a ternary multi-valued logic electronic device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor heterojunction interfaces (e.g., AlGaAs/GaAs or LaAlO3/SrTiO3) are used to form two-dimensional electron gas channels, then high electron concentration and mobility are achieved, but single crystal substrates and high-temperature processes are required, making commercialization and high integration difficult
Solution Approach 1:
The patent changes the material composition parameters by using binary oxide heterojunctions (e.g., ZnO/MgO, ZnO/CaO) instead of conventional semiconductor heterojunctions. This parameter change allows the formation of two-dimensional electron gas channels at lower temperatures and on various substrates, resolving the contradiction between high electrical performance and ease of manufacture
Solution Approach 2:
The patent employs composite oxide material structures with specific thickness ratios (first oxide layer thickness ≥ 0.5 times the second oxide layer thickness) to create stable heterojunction interfaces that support two-dimensional electron gas formation. The composite structure enables both high reliability and manufacturability by combining multiple oxide materials with complementary properties
2Productivity
If binary logic devices are used, then device structure and integration can be improved, but the devices are limited to two states (0 and 1), unable to meet the demand for multi-valued logic devices in the 4th industrial revolution
Solution Approach 1:
The patent segments the single channel into multiple stacked two-dimensional electron gas channels (first and second channels at different interfaces). Each channel can be independently controlled to represent different logic states, enabling ternary or multi-valued logic operations and increasing information processing capability
Solution Approach 2:
The patent adds a vertical dimension by stacking multiple two-dimensional electron gas channels at different heterojunction interfaces. This dimensional transition from single-plane to multi-plane channel structure enables multiple resistance states and multi-valued logic functionality while maintaining compatibility with existing device architectures
3Adaptability or versatility
If additional circuits or new single devices with unique characteristics are constructed to achieve ternary system operation, then multi-valued logic states can be obtained, but circuit complexity increases and material group and characteristic expression conditions are limited
Solution Approach 1:
The patent merges multiple two-dimensional electron gas channels into a single stacked device structure that shares common source and drain electrodes. This integration allows multi-valued logic operation through resistance state combinations of the stacked channels without requiring additional separate circuits, thereby achieving multi-valued capability while reducing overall device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves improved electrical performance and reliability by controlling the two-dimensional electron gas channels, allowing for three multi-resistance states and enhanced switching speed, overcoming the limitations of binary logic devices.
Implementation Method 1
Two-dimensional electron gas is a form in which a high concentration of electrons of 1013/cm2 to 1014/cm2 exist at the interface between two materials, and moves freely in a direction parallel to the interface, but in a direction deviating from the interface, is confined in a region of several nm
Implementation Method 2
the first two-dimensional electron gas is turned off when a magnitude of a potential difference between the gate electrode and the source electrode becomes greater than a magnitude of a first threshold voltage
Data Source
AI summary
Provided is an electronic device including a first lower material film, a first upper material film on the first lower material film, a first two-dimensional electron gas between the first lower material film and the first upper material film, a second lower material film on the first upper material film, a second upper material film on the second lower material film, a second two-dimensional electron gas between the second lower material film and the second upper material film, a source electrode on the second upper material film, a drain electrode on the second upper material film, a gate insulating film on the second upper material film, and a gate electrode on the gate insulating film.