Test Apparatus Additional Modules for High-Speed Handshake

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Solution Overview

Problem

Existing test apparatuses face challenges in achieving high-speed communication and low latency when testing devices with indeterminate performance, particularly those using external memory, due to long wiring between the device under test and the test modules, which hinders efficient handshake and data transfer.

Innovation Solution

The introduction of additional modules that communicate directly between the device under test and the test modules, enabling faster and lower-latency communication by converting undefined signals into defined signals, thereby facilitating efficient data transfer and handshake operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If test modules communicate directly with the device under test through the performance board, then the test apparatus can perform standard testing procedures, but the communication speed is limited and latency is high due to long wiring

Engineering Contradiction:
Improvecommunication speedVSAvoidsystem complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent introduces additional modules as intermediary components between the test modules and the device under test. These additional modules are positioned closer to the device under test, creating a hierarchical communication structure where the additional modules handle high-speed, low-latency communications while the test modules maintain their standard testing functions. This mediator approach resolves the contradiction by enabling faster communication without requiring complete redesign of the existing test module architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of time

If additional modules are introduced to enable high-speed communication, then communication latency is reduced, but the device complexity increases

Engineering Contradiction:
Improvecommunication latencyVSAvoidsystem complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent segments the communication function into two distinct parts: standard testing communications handled by test modules through the performance board, and high-speed data transfer communications handled by additional modules with direct connections to the device under test. This segmentation allows the system to optimize for both standard testing protocols and high-speed communication requirements simultaneously, reducing latency for time-critical operations while maintaining the existing test infrastructure.

Inventive Principle:
Principle #1Segmentation

3Productivity

If the test apparatus uses standard wiring through the performance board, then the system structure is simple, but the handshake response time cannot meet nanosecond order requirements

Engineering Contradiction:
Improvehandshake response speedVSAvoidconnection structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent adds a new dimensional layer to the connection structure by introducing additional modules that create a direct communication path parallel to the existing performance board path. This dimensional addition allows nanosecond-order handshake operations to occur through the shorter additional module connection while standard testing continues through the performance board, effectively solving the speed limitation without completely restructuring the existing system architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8362791B2Test apparatus additional module and test method
Publication Date: 2013.01.29 ADVANTEST CORP
  • US8362791B2 patent drawing
  • US8362791B2 patent drawing
  • US8362791B2 patent drawing

AI summary

A test apparatus includes: test modules that communicate with the device under test to test the device under test; additional modules connected between the device under test and the test modules, each additional module performing a communication with the device under test, the communication being at least one of a communication performed at a higher speed and a communication performed with a lower latency, in comparison with a communication performed by the test modules; a test head having a plurality of connectors that connect the test modules and the additional modules, respectively, the test modules and the additional modules are mounted on the test head; a performance board placed on the test head that connects between at least a part of terminals of the plurality of connectors and the device under test. The test modules are connected to the additional modules without through the performance board.