Test Apparatus Using Transaction-Based Packet Communication
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Solution Overview
Problem
Conventional test apparatuses face difficulties in handling large, non-deterministic devices due to increased test vector sizes and the inability to store and process transaction-based logic design models effectively, particularly in simulating devices with variable output signals.
Innovation Solution
A test apparatus and method that utilize a simulator to generate a packet communication program from a transaction-level device simulation model, allowing for packet communication between the test apparatus and the device under test, enabling efficient testing of non-deterministic devices by breaking down the test into hierarchical procedures and packet functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional test apparatus uses deterministic test vectors to test devices, then the testing process is simple and straightforward, but it cannot effectively test non-deterministic devices with variable output signals
Solution Approach 1:
The patent transforms the static, deterministic test vector approach into a dynamic, transaction-based model that can adapt to non-deterministic device behavior. The simulation environment dynamically generates test sequences based on transaction-level specifications, allowing the testing methodology to flexibly handle variable output signals and non-deterministic characteristics while maintaining structured control through the transaction model
Solution Approach 2:
The patent changes the fundamental parameters of the test data from fixed deterministic values to variable transaction-based sequences. By representing device behavior through transactions with variable cycles and conditional logic, the system can accommodate non-deterministic output signals while maintaining testability through the structured transaction model
2Productivity
If the device size increases, then the functionality and capability of the device improve, but the test vector size increases significantly making it difficult to store and process
Solution Approach 1:
The patent segments the monolithic test vector into hierarchical transaction units. Instead of storing complete device-level test vectors, the system divides testing into discrete transactions at the interface level, each representing a functional exchange. This segmentation dramatically reduces data storage requirements while maintaining comprehensive test coverage through compositional testing of transaction sequences
Solution Approach 2:
The patent introduces a transaction-based intermediary layer between the test apparatus and the device under test. This transaction model acts as a mediator that abstracts the complex internal device behavior into standardized interface exchanges, reducing the complexity and size of test data while preserving essential functional testing capabilities
3Reliability
If a simulation environment uses transaction-based logic design models, then it can represent device operations more accurately, but it becomes difficult to provide data for generating test vectors with conventional test apparatuses
Solution Approach 1:
The patent creates a universal transaction-based interface that serves multiple functions: it accurately models device behavior for simulation, generates test vectors for conventional apparatuses, and provides a standardized framework for test sequence generation. This multi-functional transaction model bridges the gap between accurate simulation and practical test vector generation, enabling both high-fidelity modeling and compatibility with existing testing infrastructure
Data Source
AI summary
There is provided a test apparatus for testing a device under test, including an obtaining section that obtains a packet sequence communicated between the test apparatus and the device under test, from a simulation environment for simulating an operation of the device under test, a packet communication program generating section that generates from the packet sequence a packet communication program for a test, where the packet communication program is to be executed by the test apparatus to communicate packets included in the packet sequence between the test apparatus and the device under test, and a testing section that executes the packet communication program to test the device under test by communicating the packets between the test apparatus and the device under test.


