Test Array Structure for Perpendicular Leakage Detection
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Solution Overview
Problem
Conventional mini array test element groups (TEGs) face difficulties in detecting current leakage in two directions perpendicular to each other, which is crucial for ensuring the quality of semiconductor wafers during fabrication.
Innovation Solution
A test array structure is designed with a substrate, bit-line rings, and word-lines arranged in a specific configuration, allowing for the measurement of current leakage between cells in two perpendicular directions, including the use of capacitors and MOSFETs to facilitate the detection of leakage between cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional mini array TEG with container is used, then the test chip can be constructed on the tested wafer, but it is difficult to test whether current leakage in two directions vertical to each other appears
Solution Approach 1:
The test array structure is divided into multiple independent cells (first cell, second cell, third cell) with distinct drain regions, gate regions, and source regions. Each cell can be independently configured to test different leakage scenarios, enabling comprehensive two-directional leakage detection through segmented test units
Solution Approach 2:
The patent introduces bit-line rings arranged in concentric patterns with word-lines extending in perpendicular directions. This two-dimensional orthogonal arrangement of bit-line rings and word-lines enables current leakage testing in two vertical directions simultaneously, transforming a single-direction test into multi-directional coverage
2Measurement precision
If multiple bit-line rings and word-lines are arranged in specific configuration, then current leakage between cells can be detected, but the device complexity increases
Solution Approach 1:
The bit-line rings and word-lines are designed to serve multiple functions: they define cell boundaries, provide electrical connections for leakage measurement, and enable selective activation of different cell configurations. This multi-functionality reduces the need for separate dedicated test structures for each measurement objective
Solution Approach 2:
The test array structure uses its own internal cell configurations and electrical connections to perform self-testing for current leakage. The drain regions, gate regions, and source regions of adjacent cells naturally form the test paths, eliminating the need for external complex testing equipment or additional test structures
Data Source
AI summary
A test array structure includes a substrate, first and second cells, first and second bit-line rings and four word-lines. Each of the first and second cells has a first drain region, a first gate region, a source region, a second gate region and a second drain region connected together in sequence. The first drain region and the first gate region of the first cell are located within the first bit-line ring. The second drain region and the second gate region of the first cell are located between the first and second bit-line rings. The first drain region and the first gate region of the second cell is located within the second bit-line ring. The second drain region of the first cell and the first drain region of the second cell are located between the two immediately-adjacent word-lines.