Test Circuit for Array Substrate Signal Line Defect Detection

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Solution Overview

Problem

The integration of signal lines on array substrates leads to frequent short-circuiting and disconnection issues, resulting in poor display performance, as existing detection methods can only utilize one of the SD OS or SD AT tests due to the need for specific short-circuit or suspended states of signal lines.

Innovation Solution

A test circuit with first and second switch units, connected to the signal lines' ends and control terminals, allowing for controlled short-circuit or suspended states, enabling both SD OS and SD AT tests to be performed on the array substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If signal lines are integrated densely on the array substrate, then the area utilization is improved, but shorting and disconnection issues occur more frequently

Engineering Contradiction:
Improvearea utilizationVSAvoidsignal line reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

A test circuit is introduced as an intermediary system between the signal lines and the testing equipment. This test circuit includes switch units that can selectively connect or disconnect signal lines, serving as a mediator to enable reliable testing without requiring physical modification of the signal lines themselves. The test circuit absorbs the complexity of line isolation and connection management.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If only one type of test (SD OS or SD AT) is performed, then the testing process is simple, but both short-circuit and disconnection defects cannot be detected simultaneously

Engineering Contradiction:
Improvetesting process simplicityVSAvoiddefect detection capability
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The test circuit is designed with dual functionality to support both SD OS (short-circuit detection) and SD AT (disconnection detection) tests. The switch units can be configured in different states to accommodate either test type, and the circuit includes dedicated test signal input terminals and output terminals that work for both detection methods. This multi-functional design allows comprehensive defect detection without requiring separate testing systems.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The test circuit incorporates switch units that can dynamically change their connection states based on the required test type. During SD OS testing, the switches are configured to detect short-circuits between adjacent signal lines. During SD AT testing, the switches are reconfigured to detect disconnections. This dynamic reconfigurability allows a single circuit to perform multiple detection functions adaptively.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If switch units are added to enable both SD OS and SD AT tests, then the defect detection capability is improved, but the device complexity increases

Engineering Contradiction:
Improvedefect detection capabilityVSAvoidtest circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The test circuit is segmented into multiple independent switch units, with each switch unit corresponding to a specific signal line. Each switch unit contains a switch element and associated control circuitry that can operate independently. This segmentation allows the complex testing functionality to be broken down into manageable, modular components that can be controlled individually, reducing the overall system complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12062305B2Test circuit, array substrate, and display panel
Publication Date: 2024.08.13 HEFEI XINSHENG OPTOELECTRONICS TECH CO LTD
  • US12062305B2 patent drawing
  • US12062305B2 patent drawing
  • US12062305B2 patent drawing

AI summary

A test circuit includes a plurality of first switch units and a plurality of second switch units. The first switch units are provided in one-to-one correspondence with a plurality of signal lines. First terminals of the first switch units are connected to first ends of the plurality of signal lines, second terminals of the first switch units are short-circuited to one another, and control terminals of the first switch units are connected to a first control signal terminal. The plurality of second switch units are provided in one-to-one correspondence with the plurality of signal lines. First terminals of the plurality of second switch units are connected to second ends of the plurality of signal lines, second terminals of the plurality of second switch units are short-circuited to one another, and control terminals of the plurality of second switch units are connected to a second control signal terminal.