Test Circuit for Storage Block Self-Testing via Internal Signal Generation
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Solution Overview
Problem
The increasing miniaturization of integrated circuits (ICs) limits the test frequency of test apparatuses due to coupling issues with cables, probe cards, and packaged pins, hindering effective testing of storage circuits.
Innovation Solution
A test circuit comprising a controller, a pattern-generator circuit, a comparing circuit, and a register is used to generate and compare test data with storage circuit data, determining normal operation by analyzing the results stored in the register, allowing for efficient testing across various modes (normal, self-test, and mixed test) without relying solely on external signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If external test apparatus with cables and probe cards is used to test storage circuits, then test coverage can be achieved, but test frequency is limited due to coupling issues
Solution Approach 1:
The patent extracts the test signal generation and comparison functions from the external test apparatus into the device under test itself. The test circuit includes a pattern generator that creates test signals internally and a comparator that evaluates results internally, removing the need for high-frequency external signal transmission through cables and probe cards while maintaining test effectiveness
Solution Approach 2:
The device under test performs self-testing through integrated test circuits that generate their own test signals and evaluate their own output. The pattern generator creates test patterns, the storage circuit processes them, and the comparator evaluates results without requiring external test equipment, enabling the system to test itself at higher frequencies
2Volume of moving object
If IC size is reduced for miniaturization, then device density improves, but test frequency is further limited by coupling constraints
Solution Approach 1:
The patent removes the bottleneck of external signal transmission by extracting test signal generation and evaluation functions into the IC itself. This allows miniaturized ICs to perform self-testing without being constrained by external cable coupling limitations, maintaining high test frequencies despite small size
Solution Approach 2:
The test circuit is nested within the device under test, with the pattern generator, storage circuit, and comparator all integrated inside the IC. This nested structure allows the test functionality to be embedded within the minimal space of the miniaturized IC without requiring external test equipment
Data Source
AI summary
A test circuit testing a storage circuit and including a controller, a pattern-generator circuit, a comparing circuit, and a first register is provided. The storage circuit includes a storage block. The controller is configured to generate a plurality of internal test signals. The pattern-generator circuit generates and provides test data to the storage circuit according to the internal test signal. The storage circuit writes the test data into the storage block and reads the storage block to generate read data. The comparing circuit compares the test data and the read data to generate a test result. The first register stores the test result. The controller determines whether the storage circuit is working normally according to the test result stored in the first register.