Test Circuit for 3D Semiconductor Through Via Resistance Measurement
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing 3D semiconductor apparatuses face challenges in precisely measuring the resistance of through-silicon vias due to variations in the ON resistance of driver and pass gate devices, making it difficult to assess the quality of via formation.
Innovation Solution
A test circuit that measures current flowing through through vias multiple times by configuring different resistance values and control signals to form current paths, allowing for precise calculation of via resistance by comparing currents under various conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single current measurement is performed through the through via using a driver and pass gate, then the measurement process is simple, but the measurement precision is poor due to process variations in the driver and pass gate resistance
Solution Approach 1:
The test circuit is divided into multiple operational segments that perform different functions: a first operation segment measures current with the driver and pass gate, while a second operation segment measures current with only the pass gate. By segmenting the measurement process into distinct phases, the circuit can isolate and eliminate the driver resistance variable, achieving precise through via resistance measurement without requiring a completely redesigned complex circuit.
Solution Approach 2:
The test circuit employs periodic switching between different operation segments controlled by test control signals. The circuit alternates between the first operation segment (driver and pass gate connected) and the second operation segment (only pass gate connected), performing sequential measurements at different time periods. This periodic action enables the system to capture multiple measurement data points that can be processed to eliminate process variations and achieve high measurement precision.
2Measurement precision
If the resistance of the through via is much smaller than the ON resistance of the pass gate and driver, then the through via structure is efficient, but it becomes difficult to measure the via resistance precisely due to the dominance of driver and pass gate resistance
Solution Approach 1:
The invention extracts and isolates the pass gate resistance component from the total measured resistance by creating a separate measurement path that excludes the driver. By taking out the driver component from the measurement circuit in the second operation segment, the system can measure only the pass gate resistance, which then serves as a reference value to subtract from the total measurement, thereby extracting the pure through via resistance value with high precision.
Solution Approach 2:
The test circuit performs excessive measurements by conducting multiple current measurements under different configuration conditions (first operation segment with both driver and pass gate, second operation segment with only pass gate). By performing more measurements than the minimum single measurement, the system generates redundant data that can be processed through calculation to eliminate the influence of driver and pass gate resistance variations, achieving precision that exceeds what a single measurement could provide.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables precise measurement of through via resistance, reducing the influence of test circuit element variations and ensuring proper formation detection, even under process variations.
Implementation Method 1
the test pad 10 applies a test voltage Vmeas to a through via VIA in a test operation, and measures the amount of current Imeas that flows through the through via VIA
Data Source
AI summary
A test circuit includes a through via test unit configured to be set to a first resistance value in response to a first test control signal and to a second resistance value in response to the first test control signal and a second test control signal, and form a current path including a through via that electrically connects a first chip and a second chip; and a test measurement unit configured to supply a test voltage to the through via and measure a current flowing through the through via.