Automated Test Data Generator for IC Verification Coverage
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Solution Overview
Problem
Conventional methods for creating test files for integrated circuit verification are time-consuming and costly, often resulting in inadequate code and functional coverage due to the high skill and experience required.
Innovation Solution
An automated mechanism using test data generators that express uncompleted coverage goals as negative assertions, allowing for the generation of test files that complete code and functional coverage goals, reducing the need for extensive engineer expertise and time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional methods are used to create test files by manually writing and simulating, then code coverage and functional coverage goals can be achieved, but the process becomes very time consuming and costly
Solution Approach 1:
The system enables self-service by automatically generating test files using formal verification tools that can autonomously create test cases to achieve coverage goals without requiring manual intervention from verification engineers for each test case
Solution Approach 2:
The patent replaces the mechanical manual process of writing and simulating test files with an automated formal verification system that uses mathematical logic and algorithms to generate test cases, substituting human manual effort with computational automation
2Manufacturing precision
If conventional methods are used to create test files by manually writing and simulating, then code coverage and functional coverage goals can be achieved, but the cost increases significantly
Solution Approach 1:
The system enables self-service by automatically generating test files using formal verification tools that can autonomously create test cases to achieve coverage goals without requiring manual intervention from verification engineers for each test case
Solution Approach 2:
The patent replaces the mechanical manual process of writing and simulating test files with an automated formal verification system that uses mathematical logic and algorithms to generate test cases, substituting human manual effort with computational automation
3Manufacturing precision
If conventional methods are used to create test files, then some code coverage is achieved, but the coverage remains inadequate due to the extensive skill and experience required
Solution Approach 1:
The patent replaces the mechanical manual process of writing and simulating test files with an automated formal verification system that uses mathematical logic and algorithms to generate test cases, substituting human manual effort with computational automation
Solution Approach 2:
The system changes the parameter of test file generation from manual expert-driven creation to automated algorithm-driven generation, transforming the process from one requiring human skill to one relying on formal verification methodologies and computational algorithms
4Reliability
If manual test file creation is performed to achieve functional coverage goals, then some verification is accomplished, but inadequate functional coverage results due to the complexity of specifying and writing comprehensive test files
Solution Approach 1:
The patent replaces the mechanical manual process of writing and simulating test files with an automated formal verification system that uses mathematical logic and algorithms to generate test cases, substituting human manual effort with computational automation
Solution Approach 2:
The system enables self-service by automatically generating test files using formal verification tools that can autonomously create test cases to achieve coverage goals without requiring manual intervention from verification engineers for each test case
Data Source
AI summary
An efficient and cost effective mechanism for generating test files for automatic verification of a device model is disclosed. Uncompleted coverage goals determined based upon simulating processing of a test file by a design model may be expressed as negative assertions for input to a test data generator, where output from the test data generator may used to create a test file for completing all or some of the uncompleted coverage goals. The test data generator may indicate data which causes a property to fail, and therefore, may indicate test data which causes the uncompleted coverage goal to succeed. The initial test file may represent zero code coverage and/or zero functional coverage, thereby enabling the test data generator to automatically create one or more test files for accomplishing the more extensive code coverage goals and/or functional coverage goals. Functional coverage goals may be automatically generated by the test data generator.