Test Map Classification for Semiconductor Defect Analysis

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Solution Overview

Problem

Current semiconductor manufacturing processes face challenges in accurately classifying test maps and setting fabrication process conditions due to variations in classification results with test data sets and the need for extensive training data, as well as difficulties in defining the number of neural network nodes, leading to inefficiencies in defect analysis and process optimization.

Innovation Solution

A method that involves converting test data into a test map with wafer identifiers and coordinates, calculating similarities using specific indexes, performing similarity filtering, and classifying spatial patterns based on similarity relationships, allowing for accurate classification independent of the number of patterns or nodes, and using these classifications to set optimal fabrication process conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If neural network methods are used for test map classification, then classification can be performed, but extensive training data is required and classification results vary with different test data sets

Engineering Contradiction:
Improveclassification accuracyVSAvoidtraining data volume
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent extracts the essential characteristics of test maps (spatial patterns, failure distributions) and uses them directly for classification without requiring extensive training data. The method extracts key features such as coordinate information, failure items, and spatial relationships to perform classification based on inherent map characteristics rather than learned patterns from large datasets.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent creates simplified representations (copies) of test maps that capture essential classification information. By generating condensed test map data structures that preserve spatial patterns and failure characteristics, the system achieves accurate classification without needing the full complexity of extensive training datasets.

Inventive Principle:
Principle #26Copying

2Adaptability or versatility

If neural network nodes are used for classification, then pattern recognition is possible, but the number of nodes is difficult to define and increases system complexity

Engineering Contradiction:
Improvepattern recognition capabilityVSAvoidnumber of nodes
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the classification problem into distinct spatial regions and pattern types within the test map. By dividing the wafer surface into coordinate-based regions and identifying failure patterns independently in each region, the system achieves versatile pattern recognition without requiring a large number of interconnected neural network nodes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from traditional neural network dimensionality (number of nodes) to spatial dimensionality (coordinate-based classification). By using the inherent two-dimensional spatial structure of the test map as the classification basis, the system achieves adaptability without increasing system complexity through additional nodes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If traditional defect analysis methods are used, then defects can be detected, but the process is time-consuming and inefficient for optimization

Engineering Contradiction:
Improvedefect detection capabilityVSAvoidanalysis speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs preliminary classification of test maps into spatial pattern categories before detailed defect analysis. By pre-grouping test maps based on their spatial failure patterns, the system reduces the computational burden of subsequent analysis and enables faster optimization processes while maintaining reliable defect detection capability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the analysis parameters from individual defect examination to spatial pattern-based classification. By transforming the approach to classify based on overall spatial distributions and patterns rather than analyzing each defect separately, the system achieves both reliable detection and improved analysis speed.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8627266B2Test map classification method and fabrication process condition setting method using the same
Publication Date: 2014.01.07 SAMSUNG ELECTRONICS CO LTD
  • US8627266B2 patent drawing
  • US8627266B2 patent drawing
  • US8627266B2 patent drawing

AI summary

A test map classification method includes modifying test data by converting to a test map including a wafer identifier, a coordinate, and data on whether a predetermined failure item occurs; calculating similarities of wafer pairs in the test map; performing similarity filtering to reset all the similarities, except for at least one similarity, on the basis of a predetermined wafer; determining whether there are similar wafers by comparing the filtered similarities with a reference value; and classifying spatial patterns using a similar relationship between the wafer pairs when there are similar wafers.