Test Masking Circuit for Semiconductor Device Testing
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Solution Overview
Problem
Existing semiconductor testing methods require significant time and lack flexibility when simultaneously testing multiple devices, as they cannot differentiate test execution for each device effectively.
Innovation Solution
An electronic device with a masking signal generation circuit, test code generation circuit, and test control circuit that utilize fuse data to control test execution based on input test commands, allowing for different test modes and reducing testing time by enabling flexible control of test execution for each device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If simultaneous testing of multiple semiconductor devices is performed using existing methods, then testing throughput is improved, but flexibility and time required for each device test increase due to inability to differentiate test execution
Solution Approach 1:
The patent segments the test execution control by introducing device-specific fuse data that allows individual test masking for each semiconductor device being simultaneously tested. The test control circuit divides the test execution into device-specific pathways based on fuse data values, enabling selective test execution for each device rather than uniform test execution for all devices.
Solution Approach 2:
The patent applies preliminary action by pre-storing fuse data in each device that indicates whether test execution should be masked. This fuse data is prepared in advance during device fabrication or initialization, allowing the test control circuit to quickly determine test execution status without real-time decision-making delays during the actual testing phase.
2Ease of manufacture
If uniform test execution is performed for all devices, then testing process simplicity is maintained, but flexibility to control test execution for each device is reduced
Solution Approach 1:
The patent implements local quality by assigning unique fuse data characteristics to each semiconductor device based on its specific test requirements. Each device's fuse data contains device-specific masking information that tailors the test execution to that particular device's needs, allowing different test configurations for different devices while maintaining a unified test system architecture.
Solution Approach 2:
The patent applies self-service by encoding test execution control information directly within each device's fuse data. Each device essentially carries its own test execution instructions, allowing the test control circuit to autonomously determine whether to execute tests for each device based on the fuse data without requiring external control signals or complex coordination.
Data Source
AI summary
An electronic device includes a masking signal generation circuit configured to generate a test masking signal by receiving a fuse data during a period in which a test masking mode is executed; and a test mode signal generation circuit configured to, when a test command for executing a test in an internal circuit is input, execute the test based on the test masking signal.